sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1811
 
+def int_aarch64_sve_cvt_bf16f32     : Builtin_SVCVT<"svcvt_bf16_f32_m",   
llvm_nxv8bf16_ty, llvm_nxv8i1_ty, llvm_nxv4f32_ty>;
+def int_aarch64_sve_cvtnt_bf16f32   : Builtin_SVCVT<"svcvtnt_bf16_f32_m", 
llvm_nxv8bf16_ty, llvm_nxv8i1_ty, llvm_nxv4f32_ty>;
----------------
fpetrogalli wrote:
> sdesmalen wrote:
> > nit:  use `fcvtbf` instead of `cvt` => `int_aarch64_sve_fcvtbf_bf16f32` ?
> Renamed to `int_aarch64_sve_fcvt_bf16f32` and 
> `int_aarch64_sve_fcvtnt_bf16f32` respectively, because I think it wouldn't 
> make sense to add the `bf` suffix to the `cvtnt` version of the intrinsic.
I meant to write `int_aarch64_sve_bfcvt_bf16f32`. This seems consistent with 
all other intrinsics (`fcvt`, `fcvtzu`, `scvtf`, etc.) that use the name of the 
instruction directly in the name of the intrinsic.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82141/new/

https://reviews.llvm.org/D82141



_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Reply via email to