Author: Craig Topper Date: 2020-06-09T16:39:41-07:00 New Revision: 641d5ac4d1965990fcf981f153369b038816cd16
URL: https://github.com/llvm/llvm-project/commit/641d5ac4d1965990fcf981f153369b038816cd16 DIFF: https://github.com/llvm/llvm-project/commit/641d5ac4d1965990fcf981f153369b038816cd16.diff LOG: [X86] Assign a feature to tremont, goldmont, goldmont-plus, icelake-client, and icelake for target multiversioning priority. Without this these CPUs all caused the compiler to assert when used for multiversioning. Added: Modified: clang/test/CodeGen/attr-target-mv.c llvm/include/llvm/Support/X86TargetParser.def Removed: ################################################################################ diff --git a/clang/test/CodeGen/attr-target-mv.c b/clang/test/CodeGen/attr-target-mv.c index b273eb846e1d..7d7135d567c2 100644 --- a/clang/test/CodeGen/attr-target-mv.c +++ b/clang/test/CodeGen/attr-target-mv.c @@ -4,6 +4,11 @@ int __attribute__((target("sse4.2"))) foo(void) { return 0; } int __attribute__((target("arch=sandybridge"))) foo(void); int __attribute__((target("arch=ivybridge"))) foo(void) {return 1;} +int __attribute__((target("arch=goldmont"))) foo(void) {return 3;} +int __attribute__((target("arch=goldmont-plus"))) foo(void) {return 4;} +int __attribute__((target("arch=tremont"))) foo(void) {return 5;} +int __attribute__((target("arch=icelake-client"))) foo(void) {return 6;} +int __attribute__((target("arch=icelake-server"))) foo(void) {return 7;} int __attribute__((target("default"))) foo(void) { return 2; } int bar() { @@ -70,6 +75,16 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double // LINUX: ret i32 0 // LINUX: define i32 @foo.arch_ivybridge() // LINUX: ret i32 1 +// LINUX: define i32 @foo.arch_goldmont() +// LINUX: ret i32 3 +// LINUX: define i32 @foo.arch_goldmont-plus() +// LINUX: ret i32 4 +// LINUX: define i32 @foo.arch_tremont() +// LINUX: ret i32 5 +// LINUX: define i32 @foo.arch_icelake-client() +// LINUX: ret i32 6 +// LINUX: define i32 @foo.arch_icelake-server() +// LINUX: ret i32 7 // LINUX: define i32 @foo() // LINUX: ret i32 2 // LINUX: define i32 @bar() @@ -79,6 +94,16 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double // WINDOWS: ret i32 0 // WINDOWS: define dso_local i32 @foo.arch_ivybridge() // WINDOWS: ret i32 1 +// WINDOWS: define dso_local i32 @foo.arch_goldmont() +// WINDOWS: ret i32 3 +// WINDOWS: define dso_local i32 @foo.arch_goldmont-plus() +// WINDOWS: ret i32 4 +// WINDOWS: define dso_local i32 @foo.arch_tremont() +// WINDOWS: ret i32 5 +// WINDOWS: define dso_local i32 @foo.arch_icelake-client() +// WINDOWS: ret i32 6 +// WINDOWS: define dso_local i32 @foo.arch_icelake-server() +// WINDOWS: ret i32 7 // WINDOWS: define dso_local i32 @foo() // WINDOWS: ret i32 2 // WINDOWS: define dso_local i32 @bar() diff --git a/llvm/include/llvm/Support/X86TargetParser.def b/llvm/include/llvm/Support/X86TargetParser.def index 4d2b615e9d3d..38d149851413 100644 --- a/llvm/include/llvm/Support/X86TargetParser.def +++ b/llvm/include/llvm/Support/X86TargetParser.def @@ -266,10 +266,10 @@ PROC_ALIAS(Bonnell, "atom") PROC_WITH_FEAT(Silvermont, "silvermont", PROC_64_BIT, FEATURE_SSE4_2) PROC_ALIAS(Silvermont, "slm") -PROC(Goldmont, "goldmont", PROC_64_BIT) -PROC(GoldmontPlus, "goldmont-plus", PROC_64_BIT) +PROC_WITH_FEAT(Goldmont, "goldmont", PROC_64_BIT, FEATURE_SSE4_2) +PROC_WITH_FEAT(GoldmontPlus, "goldmont-plus", PROC_64_BIT, FEATURE_SSE4_2) -PROC(Tremont, "tremont", PROC_64_BIT) +PROC_WITH_FEAT(Tremont, "tremont", PROC_64_BIT, FEATURE_SSE4_2) //@} /// \name Nehalem @@ -323,11 +323,11 @@ PROC_WITH_FEAT(Cannonlake, "cannonlake", PROC_64_BIT, FEATURE_AVX512VBMI) /// \name Icelake Client /// Icelake client microarchitecture based processors. -PROC(IcelakeClient, "icelake-client", PROC_64_BIT) +PROC_WITH_FEAT(IcelakeClient, "icelake-client", PROC_64_BIT, FEATURE_AVX512VBMI2) /// \name Icelake Server /// Icelake server microarchitecture based processors. -PROC(IcelakeServer, "icelake-server", PROC_64_BIT) +PROC_WITH_FEAT(IcelakeServer, "icelake-server", PROC_64_BIT, FEATURE_AVX512VBMI2) /// \name Tigerlake /// Tigerlake microarchitecture based processors. _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
