saghir updated this revision to Diff 265281.
saghir added a comment.

Added vec_msum builtin for vmsumudm.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80294/new/

https://reviews.llvm.org/D80294

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/builtins-ppc-altivec.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/P9InstrResources.td
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
  llvm/test/MC/PowerPC/ppc64-encoding-vmx.s

Index: llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
===================================================================
--- llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
+++ llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
@@ -366,6 +366,9 @@
 # CHECK-BE: vmsumuhm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x66]
 # CHECK-LE: vmsumuhm 2, 3, 4, 5             # encoding: [0x66,0x21,0x43,0x10]
             vmsumuhm 2, 3, 4, 5
+# CHECK-BE: vmsumudm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x63]
+# CHECK-LE: vmsumudm 2, 3, 4, 5             # encoding: [0x63,0x21,0x43,0x10]
+            vmsumudm 2, 3, 4, 5
 # CHECK-BE: vmsumuhs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x67]
 # CHECK-LE: vmsumuhs 2, 3, 4, 5             # encoding: [0x67,0x21,0x43,0x10]
             vmsumuhs 2, 3, 4, 5
Index: llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
===================================================================
--- llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
+++ llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
@@ -333,6 +333,9 @@
 # CHECK: vmsumuhm 2, 3, 4, 5             
 0x10 0x43 0x21 0x66
 
+# CHECK: vmsumudm 2, 3, 4, 5
+0x10 0x43 0x21 0x63
+
 # CHECK: vmsumuhs 2, 3, 4, 5             
 0x10 0x43 0x21 0x67
 
Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrAltivec.td
+++ llvm/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -614,6 +614,8 @@
                             v4i32, v16i8, v4i32>;
 def VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm,
                             v4i32, v8i16, v4i32>;
+def VMSUMUDM : VA1a_Int_Ty3<35, "vmsumudm", int_ppc_altivec_vmsumudm,
+                            v1i128, v2i64, v1i128>;
 def VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs,
                             v4i32, v8i16, v4i32>;
 
Index: llvm/lib/Target/PowerPC/P9InstrResources.td
===================================================================
--- llvm/lib/Target/PowerPC/P9InstrResources.td
+++ llvm/lib/Target/PowerPC/P9InstrResources.td
@@ -373,6 +373,7 @@
     VMSUMSHS,
     VMSUMUBM,
     VMSUMUHM,
+    VMSUMUDM,
     VMSUMUHS,
     VMULESB,
     VMULESH,
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -495,6 +495,9 @@
   def int_ppc_altivec_vmsumuhm : GCCBuiltin<"__builtin_altivec_vmsumuhm">,
             Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty,
                        llvm_v4i32_ty], [IntrNoMem]>;
+  def int_ppc_altivec_vmsumudm : GCCBuiltin<"__builtin_altivec_vmsumudm">,
+              Intrinsic<[llvm_v1i128_ty], [llvm_v2i64_ty, llvm_v2i64_ty,
+                                     llvm_v1i128_ty], [IntrNoMem]>;
   def int_ppc_altivec_vmsumuhs : GCCBuiltin<"__builtin_altivec_vmsumuhs">,
             Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty,
                        llvm_v4i32_ty], [IntrNoMem]>;
Index: clang/test/CodeGen/builtins-ppc-altivec.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-altivec.c
+++ clang/test/CodeGen/builtins-ppc-altivec.c
@@ -22,6 +22,9 @@
 vector bool int vbi = { 1, 0, 1, 0 };
 vector int vi = { -1, 2, -3, 4 };
 vector unsigned int vui = { 1, 2, 3, 4 };
+vector unsigned long long vulla = {1, 2};
+vector unsigned long long vullb = {3, 4};
+vector unsigned __int128 vui128a = {1};
 vector float vf = { -1.5, 2.5, -3.5, 4.5 };
 
 vector bool char res_vbc;
@@ -33,6 +36,7 @@
 vector pixel res_vp;
 vector bool int res_vbi;
 vector int res_vi;
+vector unsigned __int128 res_vui128;
 vector unsigned int res_vui;
 vector float res_vf;
 
@@ -2232,6 +2236,10 @@
 // CHECK: @llvm.ppc.altivec.vmsumuhm
 // CHECK-LE: @llvm.ppc.altivec.vmsumuhm
 
+  res_vui128 = vec_msum(vulla, vullb, vui128a);
+// CHECK: @llvm.ppc.altivec.vmsumudm
+// CHECK-LE: @llvm.ppc.altivec.vmsumudm
+
   res_vi  = vec_vmsummbm(vsc, vuc, vi);
 // CHECK: @llvm.ppc.altivec.vmsummbm
 // CHECK-LE: @llvm.ppc.altivec.vmsummbm
Index: clang/lib/Headers/altivec.h
===================================================================
--- clang/lib/Headers/altivec.h
+++ clang/lib/Headers/altivec.h
@@ -5465,6 +5465,14 @@
 vec_msum(vector unsigned short __a, vector unsigned short __b,
          vector unsigned int __c) {
   return __builtin_altivec_vmsumuhm(__a, __b, __c);
+
+#ifdef __POWER9_VECTOR__
+static __inline__ vector unsigned __int128 __ATTRS_o_ai
+vec_msum(vector unsigned long long __a, vector unsigned long long __b,
+         vector unsigned __int128 __c) {
+  return __builtin_altivec_vmsumudm(__a, __b, __c);
+    }
+#endif
 }
 
 /* vec_vmsummbm */
Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -84,6 +84,7 @@
 BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "")
 BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "")
 BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "")
+BUILTIN(__builtin_altivec_vmsumudm, "V1ULLLiV2ULLV2ULLV1ULLLi", "")
 BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "")
 BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "")
 BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "")
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Reply via email to