kmclaughlin marked 2 inline comments as done. kmclaughlin added inline comments.
================ Comment at: llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll:107 + ret <vscale x 4 x i64> %div +} ---------------- efriedma wrote: > Maybe also worth adding a testcase for `<vscale x 1 x i64>`, assuming that > doesn't expose anything really tricky. Promotion is not possible for `<vscale x 1 x i64>` since this would result in a `<vscale x 1 x i128>`, which is also illegal. Instead will need to widen a type such as `<vscale x 1 x i64>`, which needs some more work. For fixed width vectors, the compiler will scalarise cases such as this (e.g. from 1 x i32 to just i32), which isn't something we can do for scalable vectors because of the runtime scaling. This has never had much priority because in practice the vectoriser won't pick a VF of 1, so I think we can add support for this at a later point. Currently, tests which use types such as this will trigger the assert added to FoldBUILD_VECTOR in D78636. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78812/new/ https://reviews.llvm.org/D78812 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
