Author: Thomas Lively Date: 2020-03-19T17:15:37-07:00 New Revision: a3f974f3c3321d602a49f8ada3d3d4dd34db792a
URL: https://github.com/llvm/llvm-project/commit/a3f974f3c3321d602a49f8ada3d3d4dd34db792a DIFF: https://github.com/llvm/llvm-project/commit/a3f974f3c3321d602a49f8ada3d3d4dd34db792a.diff LOG: [WebAssembly] SIMD bitmask intrinsics and builtin functions Summary: These experimental new instructions are proposed in https://github.com/WebAssembly/simd/pull/201. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D76397 Added: Modified: clang/include/clang/Basic/BuiltinsWebAssembly.def clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-wasm.c llvm/include/llvm/IR/IntrinsicsWebAssembly.td llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll llvm/test/MC/WebAssembly/simd-encodings.s Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index b544e3b42137..86d17fc952ec 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -125,6 +125,10 @@ TARGET_BUILTIN(__builtin_wasm_all_true_i16x8, "iV8s", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_all_true_i32x4, "iV4i", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_all_true_i64x2, "iV2LLi", "nc", "unimplemented-simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i8x16, "iV16c", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i16x8, "iV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_bitmask_i32x4, "iV4i", "nc", "simd128") + TARGET_BUILTIN(__builtin_wasm_abs_f32x4, "V4fV4f", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_abs_f64x2, "V2dV2d", "nc", "simd128") diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index e42339dbcfcc..413dbf95f1b9 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -15142,6 +15142,14 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, Function *Callee = CGM.getIntrinsic(IntNo, Vec->getType()); return Builder.CreateCall(Callee, {Vec}); } + case WebAssembly::BI__builtin_wasm_bitmask_i8x16: + case WebAssembly::BI__builtin_wasm_bitmask_i16x8: + case WebAssembly::BI__builtin_wasm_bitmask_i32x4: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + Function *Callee = + CGM.getIntrinsic(Intrinsic::wasm_bitmask, Vec->getType()); + return Builder.CreateCall(Callee, {Vec}); + } case WebAssembly::BI__builtin_wasm_abs_f32x4: case WebAssembly::BI__builtin_wasm_abs_f64x2: { Value *Vec = EmitScalarExpr(E->getArg(0)); diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index b27bf75248ca..0d70ea601d79 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -511,6 +511,24 @@ int all_true_i64x2(i64x2 x) { // WEBASSEMBLY: ret } +int bitmask_i8x16(i8x16 x) { + return __builtin_wasm_bitmask_i8x16(x); + // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> %x) + // WEBASSEMBLY: ret +} + +int bitmask_i16x8(i16x8 x) { + return __builtin_wasm_bitmask_i16x8(x); + // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> %x) + // WEBASSEMBLY: ret +} + +int bitmask_i32x4(i32x4 x) { + return __builtin_wasm_bitmask_i32x4(x); + // WEBASSEMBLY: call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> %x) + // WEBASSEMBLY: ret +} + f32x4 abs_f32x4(f32x4 x) { return __builtin_wasm_abs_f32x4(x); // WEBASSEMBLY: call <4 x float> @llvm.fabs.v4f32(<4 x float> %x) diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index e97700ad724a..90b5a25d16c0 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -129,6 +129,10 @@ def int_wasm_alltrue : Intrinsic<[llvm_i32_ty], [llvm_anyvector_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_bitmask : + Intrinsic<[llvm_i32_ty], + [llvm_anyvector_ty], + [IntrNoMem, IntrSpeculatable]>; def int_wasm_qfma : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 144b7f6ca23e..7743a284091e 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -606,6 +606,18 @@ def : Pat<(i32 (seteq (i32 (!cast<NI>(reduction[1]#"_"#ty) (ty V128:$x)))>; } +multiclass SIMDBitmask<ValueType vec_t, string vec, bits<32> simdop> { + defm _#vec_t : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins), + [(set I32:$dst, + (i32 (int_wasm_bitmask (vec_t V128:$vec))) + )], + vec#".bitmask\t$dst, $vec", vec#".bitmask", simdop>; +} + +defm BITMASK : SIMDBitmask<v16i8, "i8x16", 228>; +defm BITMASK : SIMDBitmask<v8i16, "i16x8", 229>; +defm BITMASK : SIMDBitmask<v4i32, "i32x4", 230>; + //===----------------------------------------------------------------------===// // Bit shifts //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index b6680dd36aa7..77e677df6459 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -95,6 +95,16 @@ define i32 @all_v16i8(<16 x i8> %x) { ret i32 %a } +; CHECK-LABEL: bitmask_v16i8: +; SIMD128-NEXT: .functype bitmask_v16i8 (v128) -> (i32){{$}} +; SIMD128-NEXT: i8x16.bitmask $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare i32 @llvm.wasm.bitmask.v16i8(<16 x i8>) +define i32 @bitmask_v16i8(<16 x i8> %x) { + %a = call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> %x) + ret i32 %a +} + ; CHECK-LABEL: bitselect_v16i8: ; SIMD128-NEXT: .functype bitselect_v16i8 (v128, v128, v128) -> (v128){{$}} ; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}} @@ -208,6 +218,16 @@ define i32 @all_v8i16(<8 x i16> %x) { ret i32 %a } +; CHECK-LABEL: bitmask_v8i16: +; SIMD128-NEXT: .functype bitmask_v8i16 (v128) -> (i32){{$}} +; SIMD128-NEXT: i16x8.bitmask $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare i32 @llvm.wasm.bitmask.v8i16(<8 x i16>) +define i32 @bitmask_v8i16(<8 x i16> %x) { + %a = call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> %x) + ret i32 %a +} + ; CHECK-LABEL: bitselect_v8i16: ; SIMD128-NEXT: .functype bitselect_v8i16 (v128, v128, v128) -> (v128){{$}} ; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}} @@ -317,6 +337,16 @@ define i32 @all_v4i32(<4 x i32> %x) { ret i32 %a } +; CHECK-LABEL: bitmask_v4i32: +; SIMD128-NEXT: .functype bitmask_v4i32 (v128) -> (i32){{$}} +; SIMD128-NEXT: i32x4.bitmask $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare i32 @llvm.wasm.bitmask.v4i32(<4 x i32>) +define i32 @bitmask_v4i32(<4 x i32> %x) { + %a = call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> %x) + ret i32 %a +} + ; CHECK-LABEL: bitselect_v4i32: ; SIMD128-NEXT: .functype bitselect_v4i32 (v128, v128, v128) -> (v128){{$}} ; SIMD128-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $0, $1, $2{{$}} diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index e40de5335470..68797cd114ec 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -580,4 +580,13 @@ main: # CHECK: i32x4.dot_i16x8_s # encoding: [0xfd,0xdb,0x01] i32x4.dot_i16x8_s + # CHECK: i8x16.bitmask # encoding: [0xfd,0xe4,0x01] + i8x16.bitmask + + # CHECK: i16x8.bitmask # encoding: [0xfd,0xe5,0x01] + i16x8.bitmask + + # CHECK: i32x4.bitmask # encoding: [0xfd,0xe6,0x01] + i32x4.bitmask + end_function _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
