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================
Comment at: clang/test/CodeGen/arm-mve-intrinsics/vaddq.c:2
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
-// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | 
FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -S -emit-llvm -o - %s | opt -S -O1 | FileCheck %s
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature 
+mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O0 
-disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -O1 | 
FileCheck %s
----------------
dmgreen wrote:
> Why is this running the entire -O1 pass pipeline? These tests deliberately 
> uses a limit subset to not need adjusting with every midend llvm change. (But 
> not be littered with clang's verbose ir output).
> 
> I'm guessing the half args are being a pain again. Is it something to do with 
> halfs?
Yes, with just -mem2reg I get:

```
define arm_aapcs_vfpcc <8 x half> @test_vaddq_n_f16(<8 x half> %a, float 
%b.coerce) #0 {
entry:
  %b = alloca half, align 2
  %tmp = alloca float, align 4
  store float %b.coerce, float* %tmp, align 4
  %0 = bitcast float* %tmp to i8*
  %1 = bitcast half* %b to i8*
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 %1, i8* align 4 %0, i32 2, 
i1 false)
  %b1 = load half, half* %b, align 2
[...]
```
SROA seems to do the trick.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74620/new/

https://reviews.llvm.org/D74620



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