simon_tatham accepted this revision.
simon_tatham added a comment.
This revision is now accepted and ready to land.
LGTM, though I spotted a couple of even tinier last-minute nits.
================
Comment at: clang/include/clang/Basic/arm_mve.td:68
+// Vector and UVector may be different vector types at the C level i.e.
+// vectors of ame size igned/unsigned ints. Once they're lowered
+// to IR, they're just bit vectors with no sign at all, so the
----------------
Typos: "ame" and "igned" should be "same" and "signed".
================
Comment at: clang/include/clang/Basic/arm_mve.td:72
+multiclass predicated_bit_op_fp<string int_op> {
+def "": Intrinsic<Vector, (args Vector:$inactive, Vector:$a, Vector:$b,
Predicate:$pred),
+ (bitcast (IRInt<int_op, [UVector, Predicate]>
----------------
Another long line.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70547/new/
https://reviews.llvm.org/D70547
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