This revision was automatically updated to reflect the committed changes.
Closed by commit rGf0c6890f32c0: [ARM,MVE] Integer-type nitpicks in MVE
intrinsics. (authored by simon_tatham).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69790/new/
https://reviews.llvm.org/D69790
Files:
clang/include/clang/Basic/arm_mve.td
clang/include/clang/Basic/arm_mve_defs.td
clang/utils/TableGen/MveEmitter.cpp
Index: clang/utils/TableGen/MveEmitter.cpp
===================================================================
--- clang/utils/TableGen/MveEmitter.cpp
+++ clang/utils/TableGen/MveEmitter.cpp
@@ -229,6 +229,7 @@
class ScalarType : public CRegularNamedType {
ScalarTypeKind Kind;
unsigned Bits;
+ std::string NameOverride;
public:
ScalarType(const Record *Record) : CRegularNamedType(TypeKind::Scalar) {
@@ -237,6 +238,7 @@
.Case("u", ScalarTypeKind::UnsignedInt)
.Case("f", ScalarTypeKind::Float);
Bits = Record->getValueAsInt("size");
+ NameOverride = Record->getValueAsString("nameOverride");
}
unsigned sizeInBits() const override { return Bits; }
ScalarTypeKind kind() const { return Kind; }
@@ -244,6 +246,11 @@
std::string cNameBase() const override {
return toCPrefix(Kind) + utostr(Bits);
}
+ std::string cName() const override {
+ if (NameOverride.empty())
+ return CRegularNamedType::cName();
+ return NameOverride;
+ }
std::string llvmName() const override {
if (Kind == ScalarTypeKind::Float) {
if (Bits == 16)
@@ -261,6 +268,7 @@
}
bool isInteger() const { return Kind != ScalarTypeKind::Float; }
bool requiresFloat() const override { return !isInteger(); }
+ bool hasNonstandardName() const { return !NameOverride.empty(); }
static bool classof(const Type *T) {
return T->typeKind() == TypeKind::Scalar;
@@ -1263,6 +1271,8 @@
"typedef float float32_t;\n";
for (const auto &kv : ScalarTypes) {
const ScalarType *ST = kv.second.get();
+ if (ST->hasNonstandardName())
+ continue;
raw_ostream &OS = parts[ST->requiresFloat() ? Float : 0];
const VectorType *VT = getVectorType(ST);
Index: clang/include/clang/Basic/arm_mve_defs.td
===================================================================
--- clang/include/clang/Basic/arm_mve_defs.td
+++ clang/include/clang/Basic/arm_mve_defs.td
@@ -125,7 +125,9 @@
class PrimitiveType<string kind_, int size_>: Type {
string kind = kind_;
int size = size_;
+ string nameOverride = "";
}
+
// The type records defined by these foreaches have names like s32, f16, u8.
foreach size = [8, 16, 32, 64] in
foreach kind = ["u", "s"] in
@@ -134,6 +136,12 @@
foreach kind = ["f"] in
def kind # size: PrimitiveType<kind, size>;
+// Sometimes we need to refer to a type by a different name in C, when
+// ACLE defines a function parameter to be something like 'unsigned'
+// rather than uint32_t.
+def uint: PrimitiveType<"u", 32> { let nameOverride = "unsigned"; }
+def sint: PrimitiveType<"s", 32> { let nameOverride = "int"; }
+
// VecOf<t> expects t to be a scalar, and gives a 128-bit vector of whatever it
// is.
class VecOf<Type t>: ComplexType<(CTO_Vec t)>;
@@ -222,7 +230,7 @@
// memory access size is n bytes (e.g. 1 for vldrb_[whatever], 2 for vldrh,
// ...). The set of valid immediates for these is {0*n, 1*n, ..., 127*n}.
class imm_mem7bit<int membytes>
- : Immediate<u32, IB_ConstRange<0, !mul(membytes, 127)>> {
+ : Immediate<sint, IB_ConstRange<0, !mul(membytes, 127)>> {
let extra = !if(!eq(membytes, 1), ?, "Multiple");
let extraarg = !cast<string>(membytes);
}
Index: clang/include/clang/Basic/arm_mve.td
===================================================================
--- clang/include/clang/Basic/arm_mve.td
+++ clang/include/clang/Basic/arm_mve.td
@@ -98,22 +98,22 @@
(u64 (xval $pair, 0))))>;
let params = T.Int32 in {
-def vadcq: Intrinsic<Vector, (args Vector:$a, Vector:$b, Ptr<u32>:$carry),
+def vadcq: Intrinsic<Vector, (args Vector:$a, Vector:$b, Ptr<uint>:$carry),
(seq (IRInt<"vadc", [Vector]> $a, $b, (shl (load $carry), 29)):$pair,
(store (and 1, (lshr (xval $pair, 1), 29)), $carry),
(xval $pair, 0))>;
-def vadciq: Intrinsic<Vector, (args Vector:$a, Vector:$b, Ptr<u32>:$carry),
+def vadciq: Intrinsic<Vector, (args Vector:$a, Vector:$b, Ptr<uint>:$carry),
(seq (IRInt<"vadc", [Vector]> $a, $b, 0):$pair,
(store (and 1, (lshr (xval $pair, 1), 29)), $carry),
(xval $pair, 0))>;
def vadcq_m: Intrinsic<Vector, (args Vector:$inactive, Vector:$a, Vector:$b,
- Ptr<u32>:$carry, Predicate:$pred),
+ Ptr<uint>:$carry, Predicate:$pred),
(seq (IRInt<"vadc_predicated", [Vector, Predicate]> $inactive, $a, $b,
(shl (load $carry), 29), $pred):$pair,
(store (and 1, (lshr (xval $pair, 1), 29)), $carry),
(xval $pair, 0))>;
def vadciq_m: Intrinsic<Vector, (args Vector:$inactive, Vector:$a, Vector:$b,
- Ptr<u32>:$carry, Predicate:$pred),
+ Ptr<uint>:$carry, Predicate:$pred),
(seq (IRInt<"vadc_predicated", [Vector, Predicate]> $inactive, $a, $b,
0, $pred):$pair,
(store (and 1, (lshr (xval $pair, 1), 29)), $carry),
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