On Tue, 25 Jun 2019 at 09:49, Simon Tatham via cfe-commits < cfe-commits@lists.llvm.org> wrote:
> Author: statham > Date: Tue Jun 25 09:49:32 2019 > New Revision: 364331 > > URL: http://llvm.org/viewvc/llvm-project?rev=364331&view=rev > Log: > [ARM] Support inline assembler constraints for MVE. > > "To" selects an odd-numbered GPR, and "Te" an even one. There are some > 8.1-M instructions that have one too few bits in their register fields > and require registers of particular parity, without necessarily using > a consecutive even/odd pair. > > Also, the constraint letter "t" should select an MVE q-register, when > MVE is present. This didn't need any source changes, but some extra > tests have been added. > > Reviewers: dmgreen, samparker, SjoerdMeijer > > Subscribers: javed.absar, eraman, kristof.beyls, hiraditya, cfe-commits, > llvm-commits > > Tags: #clang, #llvm > > Differential Revision: https://reviews.llvm.org/D60709 > > Modified: > cfe/trunk/lib/Basic/Targets/ARM.cpp > cfe/trunk/test/CodeGen/arm-asm.c > > Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=364331&r1=364330&r2=364331&view=diff > > ============================================================================== > --- cfe/trunk/lib/Basic/Targets/ARM.cpp (original) > +++ cfe/trunk/lib/Basic/Targets/ARM.cpp Tue Jun 25 09:49:32 2019 > @@ -900,6 +900,16 @@ bool ARMTargetInfo::validateAsmConstrain > case 'Q': // A memory address that is a single base register. > Info.setAllowsMemory(); > return true; > + case 'T': > + switch (Name[1]) { > + default: > + break; > + case 'e': // Even general-purpose register > + case 'o': // Odd general-purpose register > + Info.setAllowsRegister(); > + Name++; > + return true; > + } > lib/Basic/Targets/ARM.cpp:913:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough] case 'U': // a memory reference... ^ lib/Basic/Targets/ARM.cpp:913:3: note: insert 'LLVM_FALLTHROUGH;' to silence this warning case 'U': // a memory reference... ^ LLVM_FALLTHROUGH; lib/Basic/Targets/ARM.cpp:913:3: note: insert 'break;' to avoid fall-through case 'U': // a memory reference... ^ break; Did you mean for this to fall through to the case 'U' below? If so, please add an explicit LLVM_FALLTHROUGH; and a test for this behavior. Otherwise, please fix :) > case 'U': // a memory reference... > switch (Name[1]) { > case 'q': // ...ARMV4 ldrsb > @@ -923,6 +933,7 @@ std::string ARMTargetInfo::convertConstr > std::string R; > switch (*Constraint) { > case 'U': // Two-character constraint; add "^" hint for later parsing. > + case 'T': > R = std::string("^") + std::string(Constraint, 2); > Constraint++; > break; > > Modified: cfe/trunk/test/CodeGen/arm-asm.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-asm.c?rev=364331&r1=364330&r2=364331&view=diff > > ============================================================================== > --- cfe/trunk/test/CodeGen/arm-asm.c (original) > +++ cfe/trunk/test/CodeGen/arm-asm.c Tue Jun 25 09:49:32 2019 > @@ -6,3 +6,21 @@ int t1() { > __asm__ volatile ("flds s15, %[k] \n" :: [k] "Uv" (k) : "s15"); > return 0; > } > + > +// CHECK-LABEL: @even_reg_constraint_Te > +int even_reg_constraint_Te(void) { > + int acc = 0; > + // CHECK: vaddv{{.*\^Te}} > + asm("vaddv.s8 %0, Q0" > + : "+Te" (acc)); > + return acc; > +} > + > +// CHECK-LABEL: @odd_reg_constraint_To > +int odd_reg_constraint_To(void) { > + int eacc = 0, oacc = 0; > + // CHECK: vaddlv{{.*\^To}} > + asm("vaddlv.s8 %0, %1, Q0" > + : "+Te" (eacc), "+To" (oacc)); > + return oacc; > +} > > > _______________________________________________ > cfe-commits mailing list > cfe-commits@lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits >
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