dnsampaio created this revision.
dnsampaio added reviewers: olista01, miyuki.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.
Herald added a project: clang.
dnsampaio added a parent revision: D60720: [ARM] Add v4f16 and v8f16 types to
the CallingConv.
ostannard requested changes to this revision.
ostannard added a comment.
This revision now requires changes to proceed.
Clang tests should just cover the C->IR translation, and not depend on the LLVM
backends. This should instead be an IR->asm test in the LLVM repository.
This patch adds a assembly check for the
ARM v8.2-A intrinsics.
Repository:
rC Clang
https://reviews.llvm.org/D60721
Files:
test/CodeGen/arm-v8.2a-neon-intrinsics.c
test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm
Index: test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm
===================================================================
--- /dev/null
+++ test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm
@@ -0,0 +1,1000 @@
+// CHECK-LABEL: test_vabs_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vabs.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vabsq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vabs.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vceqz_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vceq.f16 d16, d16, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vceqzq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vceq.f16 q8, q8, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgez_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcge.f16 d16, d16, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgezq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcge.f16 q8, q8, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgtz_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcgt.f16 d16, d16, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgtzq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcgt.f16 q8, q8, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vclez_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcle.f16 d16, d16, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vclezq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcle.f16 q8, q8, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcltz_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vclt.f16 d16, d16, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcltzq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vclt.f16 q8, q8, #0
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_f16_s16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.s16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_f16_s16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.s16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_f16_u16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.u16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_f16_u16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.u16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.s16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.s16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.u16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.u16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvta_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvta.s16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvta_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvta.u16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtaq_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvta.s16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtm_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtm.s16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtmq_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtm.s16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtm_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtm.u16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtmq_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtm.u16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtn_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtn.s16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtnq_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtn.s16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtn_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtn.u16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtnq_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtn.u16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtp_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtp.s16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtpq_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtp.s16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtp_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtp.u16.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtpq_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvtp.u16.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vneg_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vneg.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vnegq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vneg.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrecpe_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrecpe.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrecpeq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrecpe.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrnd_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintz.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintz.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrnda_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrinta.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndaq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrinta.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndm_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintm.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndmq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintm.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndn_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintn.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndnq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintn.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndp_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintp.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndpq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintp.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndx_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintx.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrndxq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrintx.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrsqrte_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrsqrte.f16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrsqrteq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrsqrte.f16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vadd_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vadd.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vaddq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vadd.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vabd_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vabd.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vabdq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vabd.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcage_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vacge.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcageq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vacge.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcagt_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vacgt.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcagtq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vacgt.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcale_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vacge.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcaleq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vacge.f16 q8, q9, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcalt_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vacgt.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcaltq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vacgt.f16 q8, q9, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vceq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vceq.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vceqq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vceq.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcge_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vcge.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgeq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vcge.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgt_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vcgt.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcgtq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vcgt.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcle_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vcge.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcleq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vcge.f16 q8, q9, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vclt_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vcgt.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcltq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vcgt.f16 q8, q9, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_n_f16_s16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.s16 d16, d16, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_n_f16_s16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.s16 q8, q8, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_n_f16_u16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.u16 d16, d16, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_n_f16_u16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.f16.u16 q8, q8, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_n_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.s16.f16 d16, d16, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_n_s16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.s16.f16 q8, q8, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvt_n_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.u16.f16 d16, d16, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vcvtq_n_u16_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vcvt.u16.f16 q8, q8, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmax_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vmax.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmaxq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vmax.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmaxnm_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vmaxnm.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmaxnmq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vmaxnm.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmin_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vmin.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vminq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vmin.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vminnm_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vminnm.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vminnmq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vminnm.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmul_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vmul.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmulq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: mov r12, sp
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vld1.32 {d18, d19}, [r12]
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmul.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vpadd_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vpadd.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vpmax_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vpmax.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vpmin_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vpmin.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrecps_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vrecps.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrecpsq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vrecps.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrsqrts_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vrsqrts.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrsqrtsq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vrsqrts.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vsub_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vsub.f16 d16, d17, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vsubq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+// CHECK-NEXT: vsub.f16 q8, q8, q9
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vfma_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vldr d16, [sp]
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: vfma.f16 d18, d17, d16
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vfmaq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: add r12, sp, #16
+// CHECK-NEXT: vld1.32 {d16, d17}, [r12]
+// CHECK-NEXT: vmov d19, r2, r3
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d20, d21}, [r0]
+// CHECK-NEXT: vfma.f16 q9, q10, q8
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: vmov r2, r3, d19
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vfms_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vneg.f16 d16, d16
+// CHECK-NEXT: vldr d17, [sp]
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: vfma.f16 d18, d16, d17
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vfmsq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: mov r12, sp
+// CHECK-NEXT: vld1.32 {d16, d17}, [r12]
+// CHECK-NEXT: vneg.f16 q8, q8
+// CHECK-NEXT: vmov d19, r2, r3
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: add r0, sp, #16
+// CHECK-NEXT: vld1.32 {d20, d21}, [r0]
+// CHECK-NEXT: vfma.f16 q9, q8, q10
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: vmov r2, r3, d19
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmul_lane_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d0, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmul.f16 d16, d16, d0[3]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmulq_lane_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vldr d0, [sp]
+// CHECK-NEXT: vmul.f16 q8, q8, d0[3]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmul_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov.f16 s0, r2
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vmul.f16 d16, d16, d0[0]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmulq_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.16 {d18[], d19[]}, [r0:16]
+// CHECK-NEXT: vmul.f16 q8, q9, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vbsl_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vldr d16, [sp]
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: vbsl d18, d17, d16
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vbslq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: add r12, sp, #16
+// CHECK-NEXT: vld1.32 {d16, d17}, [r12]
+// CHECK-NEXT: vmov d19, r2, r3
+// CHECK-NEXT: vmov d18, r0, r1
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d20, d21}, [r0]
+// CHECK-NEXT: vbsl q9, q10, q8
+// CHECK-NEXT: vmov r0, r1, d18
+// CHECK-NEXT: vmov r2, r3, d19
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vzip_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: ldr r12, [sp]
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vzip.16 d16, d17
+// CHECK-NEXT: vst1.16 {d16}, [r0]!
+// CHECK-NEXT: vstr d17, [r0]
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vzipq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: push {lr}
+// CHECK-NEXT: ldr r12, [sp, #4]
+// CHECK-NEXT: add lr, sp, #8
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vld1.32 {d18, d19}, [lr]
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vzip.16 q8, q9
+// CHECK-NEXT: vst1.16 {d16, d17}, [r0]!
+// CHECK-NEXT: vst1.32 {d18, d19}, [r0]
+// CHECK-NEXT: pop {lr}
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vuzp_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: ldr r12, [sp]
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vuzp.16 d16, d17
+// CHECK-NEXT: vst1.16 {d16}, [r0]!
+// CHECK-NEXT: vstr d17, [r0]
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vuzpq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: push {lr}
+// CHECK-NEXT: ldr r12, [sp, #4]
+// CHECK-NEXT: add lr, sp, #8
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vld1.32 {d18, d19}, [lr]
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vuzp.16 q8, q9
+// CHECK-NEXT: vst1.16 {d16, d17}, [r0]!
+// CHECK-NEXT: vst1.32 {d18, d19}, [r0]
+// CHECK-NEXT: pop {lr}
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vtrn_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: ldr r12, [sp]
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vtrn.16 d16, d17
+// CHECK-NEXT: vst1.16 {d16}, [r0]!
+// CHECK-NEXT: vstr d17, [r0]
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vtrnq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: push {lr}
+// CHECK-NEXT: ldr r12, [sp, #4]
+// CHECK-NEXT: add lr, sp, #8
+// CHECK-NEXT: vmov d16, r1, r2
+// CHECK-NEXT: vld1.32 {d18, d19}, [lr]
+// CHECK-NEXT: vmov d17, r3, r12
+// CHECK-NEXT: vtrn.16 q8, q9
+// CHECK-NEXT: vst1.16 {d16, d17}, [r0]!
+// CHECK-NEXT: vst1.32 {d18, d19}, [r0]
+// CHECK-NEXT: pop {lr}
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmov_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov.f16 s0, r0
+// CHECK-NEXT: vdup.16 d16, d0[0]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vmovq_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov.f16 s0, r0
+// CHECK-NEXT: vdup.16 q8, d0[0]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vdup_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov.f16 s0, r0
+// CHECK-NEXT: vdup.16 d16, d0[0]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vdupq_n_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov.f16 s0, r0
+// CHECK-NEXT: vdup.16 q8, d0[0]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vdup_lane_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vdup.32 d16, d16[3]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vdupq_lane_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vdup.16 q8, d16[3]
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vext_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r2, r3
+// CHECK-NEXT: vmov d17, r0, r1
+// CHECK-NEXT: vext.16 d16, d17, d16, #2
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vextq_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: mov r0, sp
+// CHECK-NEXT: vld1.32 {d16, d17}, [r0]
+// CHECK-NEXT: vmov d19, r2, r3
+// CHECK-NEXT: vext.16 q8, q9, q8, #5
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrev64_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrev64.16 d16, d16
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: bx lr
+// CHECK-LABEL: test_vrev64q_f16:
+// CHECK: .fnstart
+// CHECK-NEXT: vmov d17, r2, r3
+// CHECK-NEXT: vmov d16, r0, r1
+// CHECK-NEXT: vrev64.16 q8, q8
+// CHECK-NEXT: vmov r0, r1, d16
+// CHECK-NEXT: vmov r2, r3, d17
+// CHECK-NEXT: bx lr
Index: test/CodeGen/arm-v8.2a-neon-intrinsics.c
===================================================================
--- test/CodeGen/arm-v8.2a-neon-intrinsics.c
+++ test/CodeGen/arm-v8.2a-neon-intrinsics.c
@@ -3,6 +3,9 @@
// RUN: | opt -S -mem2reg \
// RUN: | FileCheck %s
+// RUN: %clang_cc1 -triple armv8.2a-linux-gnu -target-abi apcs-gnu -target-feature +neon -target-feature +fullfp16 \
+// RUN: -fallow-half-arguments-and-returns -S -O1 -o - %s | FileCheck %s.asm
+
// REQUIRES: arm-registered-target
#include <arm_neon.h>
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