Author: olista01 Date: Fri Mar 29 06:32:41 2019 New Revision: 357250 URL: http://llvm.org/viewvc/llvm-project?rev=357250&view=rev Log: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers will be used for the TLS base pointer. This is a followup to rL356657 which added subtarget features to enable accesses to the privileged thread ID registers. Patch by Philip Derrin! Differential revision: https://reviews.llvm.org/D59631 Modified: cfe/trunk/include/clang/Driver/Options.td cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp cfe/trunk/test/Driver/clang-translation.c Modified: cfe/trunk/include/clang/Driver/Options.td URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=357250&r1=357249&r2=357250&view=diff ============================================================================== --- cfe/trunk/include/clang/Driver/Options.td (original) +++ cfe/trunk/include/clang/Driver/Options.td Fri Mar 29 06:32:41 2019 @@ -2016,8 +2016,8 @@ def mexecute_only : Flag<["-"], "mexecut HelpText<"Disallow generation of data access to code sections (ARM only)">; def mno_execute_only : Flag<["-"], "mno-execute-only">, Group<m_arm_Features_Group>, HelpText<"Allow generation of data access to code sections (ARM only)">; -def mtp_mode_EQ : Joined<["-"], "mtp=">, Group<m_arm_Features_Group>, Values<"soft, cp15">, - HelpText<"Read thread pointer from coprocessor register (ARM only)">; +def mtp_mode_EQ : Joined<["-"], "mtp=">, Group<m_arm_Features_Group>, Values<"soft,cp15,el0,el1,el2,el3">, + HelpText<"Thread pointer access method (AArch32/AArch64 only)">; def mpure_code : Flag<["-"], "mpure-code">, Alias<mexecute_only>; // Alias for GCC compatibility def mno_pure_code : Flag<["-"], "mno-pure-code">, Alias<mno_execute_only>; def mtvos_version_min_EQ : Joined<["-"], "mtvos-version-min=">, Group<m_Group>; Modified: cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp?rev=357250&r1=357249&r2=357250&view=diff ============================================================================== --- cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp (original) +++ cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp Fri Mar 29 06:32:41 2019 @@ -194,6 +194,18 @@ void aarch64::getAArch64TargetFeatures(c Features.push_back("-neon"); } + if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) { + StringRef Mtp = A->getValue(); + if (Mtp == "el3") + Features.push_back("+tpidr-el3"); + else if (Mtp == "el2") + Features.push_back("+tpidr-el2"); + else if (Mtp == "el1") + Features.push_back("+tpidr-el1"); + else if (Mtp != "el0") + D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args); + } + // En/disable crc if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) { if (A->getOption().matches(options::OPT_mcrc)) Modified: cfe/trunk/test/Driver/clang-translation.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/clang-translation.c?rev=357250&r1=357249&r2=357250&view=diff ============================================================================== --- cfe/trunk/test/Driver/clang-translation.c (original) +++ cfe/trunk/test/Driver/clang-translation.c Fri Mar 29 06:32:41 2019 @@ -120,6 +120,36 @@ // RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_NON %s // ARMv7_THREAD_POINTER_NON-NOT: "-target-feature" "+read-tp-hard" +// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a 2>&1 | \ +// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_NON %s +// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el1" +// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el2" +// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el3" + +// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el0 2>&1 | \ +// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL0 %s +// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el1" +// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el2" +// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el3" + +// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el1 2>&1 | \ +// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL1 %s +// ARMv8_THREAD_POINTER_EL1: "-target-feature" "+tpidr-el1" +// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el2" +// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el3" + +// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el2 2>&1 | \ +// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL2 %s +// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el1" +// ARMv8_THREAD_POINTER_EL2: "-target-feature" "+tpidr-el2" +// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el3" + +// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el3 2>&1 | \ +// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL3 %s +// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el1" +// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el2" +// ARMv8_THREAD_POINTER_EL3: "-target-feature" "+tpidr-el3" + // RUN: %clang -target powerpc64-unknown-linux-gnu \ // RUN: -### -S %s -mcpu=G5 2>&1 | FileCheck -check-prefix=PPCG5 %s // PPCG5: clang _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
