samparker created this revision.
samparker added a reviewer: t.p.northover.
Herald added subscribers: kristof.beyls, javed.absar.
The ACLE states that 64-bit crc32 operands are uint64_t so we should have the
clang builtin match this description - which is what we already do for AArch32.
https://reviews.llvm.org/D56852
Files:
include/clang/Basic/BuiltinsAArch64.def
test/CodeGen/arm64-crc32.c
Index: test/CodeGen/arm64-crc32.c
===================================================================
--- test/CodeGen/arm64-crc32.c
+++ test/CodeGen/arm64-crc32.c
@@ -1,54 +1,57 @@
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple arm64-none-linux-gnu \
// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg |
FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-windows \
+// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg |
FileCheck %s
+#include <stdint.h>
-int crc32b(int a, char b)
+uint32_t crc32b(uint32_t a, uint8_t b)
{
return __builtin_arm_crc32b(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
}
-int crc32cb(int a, char b)
+uint32_t crc32cb(uint32_t a, uint8_t b)
{
return __builtin_arm_crc32cb(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
}
-int crc32h(int a, short b)
+uint32_t crc32h(uint32_t a, uint16_t b)
{
return __builtin_arm_crc32h(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
}
-int crc32ch(int a, short b)
+uint32_t crc32ch(uint32_t a, uint16_t b)
{
return __builtin_arm_crc32ch(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
}
-int crc32w(int a, int b)
+uint32_t crc32w(uint32_t a, uint32_t b)
{
return __builtin_arm_crc32w(a,b);
// CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
}
-int crc32cw(int a, int b)
+uint32_t crc32cw(uint32_t a, uint32_t b)
{
return __builtin_arm_crc32cw(a,b);
// CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
}
-int crc32d(int a, long b)
+uint32_t crc32d(uint32_t a, uint64_t b)
{
return __builtin_arm_crc32d(a,b);
// CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
}
-int crc32cd(int a, long b)
+uint32_t crc32cd(uint32_t a, uint64_t b)
{
return __builtin_arm_crc32cd(a,b);
// CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)
Index: include/clang/Basic/BuiltinsAArch64.def
===================================================================
--- include/clang/Basic/BuiltinsAArch64.def
+++ include/clang/Basic/BuiltinsAArch64.def
@@ -50,8 +50,8 @@
BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc")
BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc")
BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc")
-BUILTIN(__builtin_arm_crc32d, "UiUiLUi", "nc")
-BUILTIN(__builtin_arm_crc32cd, "UiUiLUi", "nc")
+BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc")
+BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc")
// Memory barrier
BUILTIN(__builtin_arm_dmb, "vUi", "nc")
Index: test/CodeGen/arm64-crc32.c
===================================================================
--- test/CodeGen/arm64-crc32.c
+++ test/CodeGen/arm64-crc32.c
@@ -1,54 +1,57 @@
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple arm64-none-linux-gnu \
// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-windows \
+// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+#include <stdint.h>
-int crc32b(int a, char b)
+uint32_t crc32b(uint32_t a, uint8_t b)
{
return __builtin_arm_crc32b(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
}
-int crc32cb(int a, char b)
+uint32_t crc32cb(uint32_t a, uint8_t b)
{
return __builtin_arm_crc32cb(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
}
-int crc32h(int a, short b)
+uint32_t crc32h(uint32_t a, uint16_t b)
{
return __builtin_arm_crc32h(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
}
-int crc32ch(int a, short b)
+uint32_t crc32ch(uint32_t a, uint16_t b)
{
return __builtin_arm_crc32ch(a,b);
// CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
// CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
}
-int crc32w(int a, int b)
+uint32_t crc32w(uint32_t a, uint32_t b)
{
return __builtin_arm_crc32w(a,b);
// CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
}
-int crc32cw(int a, int b)
+uint32_t crc32cw(uint32_t a, uint32_t b)
{
return __builtin_arm_crc32cw(a,b);
// CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
}
-int crc32d(int a, long b)
+uint32_t crc32d(uint32_t a, uint64_t b)
{
return __builtin_arm_crc32d(a,b);
// CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
}
-int crc32cd(int a, long b)
+uint32_t crc32cd(uint32_t a, uint64_t b)
{
return __builtin_arm_crc32cd(a,b);
// CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)
Index: include/clang/Basic/BuiltinsAArch64.def
===================================================================
--- include/clang/Basic/BuiltinsAArch64.def
+++ include/clang/Basic/BuiltinsAArch64.def
@@ -50,8 +50,8 @@
BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc")
BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc")
BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc")
-BUILTIN(__builtin_arm_crc32d, "UiUiLUi", "nc")
-BUILTIN(__builtin_arm_crc32cd, "UiUiLUi", "nc")
+BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc")
+BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc")
// Memory barrier
BUILTIN(__builtin_arm_dmb, "vUi", "nc")
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