Author: sfantao
Date: Thu Jan 7 08:58:16 2016
New Revision: 257065
URL: http://llvm.org/viewvc/llvm-project?rev=257065&view=rev
Log:
[OpenMP] Fix issue in the offloading metadata testing.
- Allow device ID to be signed.
- Add missing semicolon to some of the CHECK directives.
Thanks to Amjad Aboud for detecting the issue.
Modified:
cfe/trunk/test/OpenMP/target_codegen_registration.cpp
cfe/trunk/test/OpenMP/target_codegen_registration_naming.cpp
Modified: cfe/trunk/test/OpenMP/target_codegen_registration.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/target_codegen_registration.cpp?rev=257065&r1=257064&r2=257065&view=diff
==============================================================================
--- cfe/trunk/test/OpenMP/target_codegen_registration.cpp (original)
+++ cfe/trunk/test/OpenMP/target_codegen_registration.cpp Thu Jan 7 08:58:16
2016
@@ -407,31 +407,31 @@ int bar(int a){
// Check metadata is properly generated:
// CHECK: !omp_offload.info = !{!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
-// CHECK-DAG = !{i32 0, i32 [[DEVID:[0-9]+]], i32 [[FILEID:-?[0-9]+]],
!"_ZN2SB3fooEv", i32 160, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SDD2Ev", i32 210,
i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SEC2Ev", i32 226,
i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SED2Ev", i32 232,
i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]]
!"_ZN2STILi1000EE3fooEv", i32 243, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi100EEC2Ev",
i32 249, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_Z3bari", i32 352, i32
11, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi100EED2Ev",
i32 255, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi1000EEC2Ev",
i32 249, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi1000EED2Ev",
i32 255, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi100EE3fooEv",
i32 243, i32 13, i32 {{[0-9]}}+}
-// CHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SCC2Ev", i32 185,
i32 13, i32 {{[0-9]}}+}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID:-?[0-9]+]], i32 [[FILEID:-?[0-9]+]],
!"_ZN2SB3fooEv", i32 193, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SDD1Ev", i32
243, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SEC1Ev", i32
259, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SED1Ev", i32
265, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EE3fooEv", i32 276, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2STILi100EEC1Ev",
i32 282, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_Z3bari", i32 402,
i32 11, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2STILi100EED1Ev",
i32 288, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EEC1Ev", i32 282, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EED1Ev", i32 288, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi100EE3fooEv", i32 276, i32 13, i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SCC1Ev", i32
218, i32 13, i32 {{[0-9]+}}}
// TCHECK: !omp_offload.info = !{!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID:[0-9]+]], i32 [[FILEID:-?[0-9]+]],
!"_ZN2SB3fooEv", i32 160, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SDD2Ev", i32 210,
i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SEC2Ev", i32 226,
i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SED2Ev", i32 232,
i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]]
!"_ZN2STILi1000EE3fooEv", i32 243, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi100EEC2Ev",
i32 249, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_Z3bari", i32 352,
i32 11, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi100EED2Ev",
i32 255, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi1000EEC2Ev",
i32 249, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2STILi1000EED2Ev",
i32 255, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]]
!"_ZN2STILi100EE3fooEv", i32 243, i32 13, i32 {{[0-9]}}+}
-// TCHECK-DAG = !{i32 0, i32 [[DEVID]], i32 [[FILEID]] !"_ZN2SCC2Ev", i32 185,
i32 13, i32 {{[0-9]}}+}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID:-?[0-9]+]], i32 [[FILEID:-?[0-9]+]],
!"_ZN2SB3fooEv", i32 193, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SDD1Ev", i32
243, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SEC1Ev", i32
259, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SED1Ev", i32
265, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EE3fooEv", i32 276, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi100EEC1Ev", i32 282, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_Z3bari", i32 402,
i32 11, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi100EED1Ev", i32 288, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EEC1Ev", i32 282, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi1000EED1Ev", i32 288, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]],
!"_ZN2STILi100EE3fooEv", i32 276, i32 13, i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 [[DEVID]], i32 [[FILEID]], !"_ZN2SCC1Ev", i32
218, i32 13, i32 {{[0-9]+}}}
#endif
Modified: cfe/trunk/test/OpenMP/target_codegen_registration_naming.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/OpenMP/target_codegen_registration_naming.cpp?rev=257065&r1=257064&r2=257065&view=diff
==============================================================================
--- cfe/trunk/test/OpenMP/target_codegen_registration_naming.cpp (original)
+++ cfe/trunk/test/OpenMP/target_codegen_registration_naming.cpp Thu Jan 7
08:58:16 2016
@@ -57,10 +57,10 @@ int nested(int a){
// Check metadata is properly generated:
// CHECK: !omp_offload.info = !{!{{[0-9]+}}, !{{[0-9]+}}}
-// CHECK-DAG: = !{i32 0, i32 {{[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T1L]], i32 [[T1C]], i32 {{[0-9]+}}}
-// CHECK-DAG: = !{i32 0, i32 {{[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T2L]], i32 [[T2C]], i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 {{-?[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T1L]], i32 [[T1C]], i32 {{[0-9]+}}}
+// CHECK-DAG: = !{i32 0, i32 {{-?[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T2L]], i32 [[T2C]], i32 {{[0-9]+}}}
// TCHECK: !omp_offload.info = !{!{{[0-9]+}}, !{{[0-9]+}}}
-// TCHECK-DAG: = !{i32 0, i32 {{[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T1L]], i32 [[T1C]], i32 {{[0-9]+}}}
-// TCHECK-DAG: = !{i32 0, i32 {{[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]", i32
[[T2L]], i32 [[T2C]], i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 {{-?[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]",
i32 [[T1L]], i32 [[T1C]], i32 {{[0-9]+}}}
+// TCHECK-DAG: = !{i32 0, i32 {{-?[0-9]+}}, i32 {{-?[0-9]+}}, !"[[NNAME]]",
i32 [[T2L]], i32 [[T2C]], i32 {{[0-9]+}}}
#endif
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