Author: ctopper
Date: Sun Oct 18 22:17:00 2015
New Revision: 250677
URL: http://llvm.org/viewvc/llvm-project?rev=250677&view=rev
Log:
Revert r250676 "Return an ArrayRef instead of having two out parameters of a
pointer and length. NFC"
Modified:
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/lib/Basic/TargetInfo.cpp
cfe/trunk/lib/Basic/Targets.cpp
Modified: cfe/trunk/include/clang/Basic/TargetInfo.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/TargetInfo.h?rev=250677&r1=250676&r2=250677&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/TargetInfo.h (original)
+++ cfe/trunk/include/clang/Basic/TargetInfo.h Sun Oct 18 22:17:00 2015
@@ -930,10 +930,14 @@ protected:
virtual enum IntType getPtrDiffTypeV(unsigned AddrSpace) const {
return PtrDiffType;
}
- virtual ArrayRef<const char *> getGCCRegNames() const = 0;
- virtual ArrayRef<GCCRegAlias> getGCCRegAliases() const = 0;
- virtual ArrayRef<AddlRegName> getGCCAddlRegNames() const {
- return None;
+ virtual void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const = 0;
+ virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const = 0;
+ virtual void getGCCAddlRegNames(const AddlRegName *&Addl,
+ unsigned &NumAddl) const {
+ Addl = nullptr;
+ NumAddl = 0;
}
};
Modified: cfe/trunk/lib/Basic/TargetInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/TargetInfo.cpp?rev=250677&r1=250676&r2=250677&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/TargetInfo.cpp (original)
+++ cfe/trunk/lib/Basic/TargetInfo.cpp Sun Oct 18 22:17:00 2015
@@ -349,41 +349,49 @@ bool TargetInfo::isValidGCCRegisterName(
if (Name.empty())
return false;
+ const char * const *Names;
+ unsigned NumNames;
+
// Get rid of any register prefix.
Name = removeGCCRegisterPrefix(Name);
if (Name.empty())
return false;
- ArrayRef<const char *> Names = getGCCRegNames();
+ getGCCRegNames(Names, NumNames);
// If we have a number it maps to an entry in the register name array.
if (isDigit(Name[0])) {
int n;
if (!Name.getAsInteger(0, n))
- return n >= 0 && (unsigned)n < Names.size();
+ return n >= 0 && (unsigned)n < NumNames;
}
// Check register names.
- for (unsigned i = 0; i < Names.size(); i++) {
+ for (unsigned i = 0; i < NumNames; i++) {
if (Name == Names[i])
return true;
}
// Check any additional names that we have.
- ArrayRef<AddlRegName> AddlNames = getGCCAddlRegNames();
- for (unsigned i = 0; i < AddlNames.size(); i++)
+ const AddlRegName *AddlNames;
+ unsigned NumAddlNames;
+ getGCCAddlRegNames(AddlNames, NumAddlNames);
+ for (unsigned i = 0; i < NumAddlNames; i++)
for (unsigned j = 0; j < llvm::array_lengthof(AddlNames[i].Names); j++) {
if (!AddlNames[i].Names[j])
break;
// Make sure the register that the additional name is for is within
// the bounds of the register names from above.
- if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < Names.size())
+ if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
return true;
}
// Now check aliases.
- ArrayRef<GCCRegAlias> Aliases = getGCCRegAliases();
- for (unsigned i = 0; i < Aliases.size(); i++) {
+ const GCCRegAlias *Aliases;
+ unsigned NumAliases;
+
+ getGCCRegAliases(Aliases, NumAliases);
+ for (unsigned i = 0; i < NumAliases; i++) {
for (unsigned j = 0 ; j < llvm::array_lengthof(Aliases[i].Aliases); j++) {
if (!Aliases[i].Aliases[j])
break;
@@ -402,33 +410,41 @@ TargetInfo::getNormalizedGCCRegisterName
// Get rid of any register prefix.
Name = removeGCCRegisterPrefix(Name);
- ArrayRef<const char *> Names = getGCCRegNames();
+ const char * const *Names;
+ unsigned NumNames;
+
+ getGCCRegNames(Names, NumNames);
// First, check if we have a number.
if (isDigit(Name[0])) {
int n;
if (!Name.getAsInteger(0, n)) {
- assert(n >= 0 && (unsigned)n < Names.size() &&
+ assert(n >= 0 && (unsigned)n < NumNames &&
"Out of bounds register number!");
return Names[n];
}
}
// Check any additional names that we have.
- ArrayRef<AddlRegName> AddlNames = getGCCAddlRegNames();
- for (unsigned i = 0; i < AddlNames.size(); i++)
+ const AddlRegName *AddlNames;
+ unsigned NumAddlNames;
+ getGCCAddlRegNames(AddlNames, NumAddlNames);
+ for (unsigned i = 0; i < NumAddlNames; i++)
for (unsigned j = 0; j < llvm::array_lengthof(AddlNames[i].Names); j++) {
if (!AddlNames[i].Names[j])
break;
// Make sure the register that the additional name is for is within
// the bounds of the register names from above.
- if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < Names.size())
+ if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
return Name;
}
// Now check aliases.
- ArrayRef<GCCRegAlias> Aliases = getGCCRegAliases();
- for (unsigned i = 0; i < Aliases.size(); i++) {
+ const GCCRegAlias *Aliases;
+ unsigned NumAliases;
+
+ getGCCRegAliases(Aliases, NumAliases);
+ for (unsigned i = 0; i < NumAliases; i++) {
for (unsigned j = 0 ; j < llvm::array_lengthof(Aliases[i].Aliases); j++) {
if (!Aliases[i].Aliases[j])
break;
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=250677&r1=250676&r2=250677&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Sun Oct 18 22:17:00 2015
@@ -898,8 +898,10 @@ public:
void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
bool Enabled) const override;
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
switch (*Name) {
@@ -1386,8 +1388,10 @@ const char * const PPCTargetInfo::GCCReg
"sfp"
};
-ArrayRef<const char*> PPCTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
@@ -1460,8 +1464,10 @@ const TargetInfo::GCCRegAlias PPCTargetI
{ { "cc" }, "cr0" },
};
-ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
- return GCCRegAliases;
+void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
class PPC32TargetInfo : public PPCTargetInfo {
@@ -1646,10 +1652,13 @@ public:
return Feature == "ptx" || Feature == "nvptx";
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
// No aliases.
- return None;
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
@@ -1697,8 +1706,10 @@ const Builtin::Info NVPTXTargetInfo::Bui
const char *const NVPTXTargetInfo::GCCRegNames[] = {"r0"};
-ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void NVPTXTargetInfo::getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
class NVPTX32TargetInfo : public NVPTXTargetInfo {
@@ -1813,10 +1824,13 @@ public:
return "";
}
- ArrayRef<const char *> getGCCRegNames() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
@@ -1993,8 +2007,10 @@ const char * const AMDGPUTargetInfo::GCC
"vcc_lo", "vcc_hi", "flat_scr_lo", "flat_scr_hi"
};
-ArrayRef<const char *> AMDGPUTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void AMDGPUTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
// Namespace for x86 abstract base class
@@ -2341,14 +2357,20 @@ public:
Records = BuiltinInfo;
NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
}
- ArrayRef<const char *> getGCCRegNames() const override {
- return GCCRegNames;
- }
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
- }
- ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override {
- return AddlRegNames;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
+ }
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
+ Aliases = nullptr;
+ NumAliases = 0;
+ }
+ void getGCCAddlRegNames(const AddlRegName *&Names,
+ unsigned &NumNames) const override {
+ Names = AddlRegNames;
+ NumNames = llvm::array_lengthof(AddlRegNames);
}
bool validateCpuSupports(StringRef Name) const override;
bool validateAsmConstraint(const char *&Name,
@@ -4798,8 +4820,10 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
switch (*Name) {
@@ -4934,8 +4958,10 @@ const char * const ARMTargetInfo::GCCReg
"q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
};
-ArrayRef<const char *> ARMTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
@@ -4959,8 +4985,10 @@ const TargetInfo::GCCRegAlias ARMTargetI
// don't want to substitute one of these for a different-sized one.
};
-ArrayRef<TargetInfo::GCCRegAlias> ARMTargetInfo::getGCCRegAliases() const {
- return GCCRegAliases;
+void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
@@ -5327,8 +5355,10 @@ public:
return TargetInfo::AArch64ABIBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
@@ -5438,8 +5468,10 @@ const char *const AArch64TargetInfo::GCC
"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
};
-ArrayRef<const char *> AArch64TargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void AArch64TargetInfo::getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
const TargetInfo::GCCRegAlias AArch64TargetInfo::GCCRegAliases[] = {
@@ -5451,8 +5483,10 @@ const TargetInfo::GCCRegAlias AArch64Tar
// don't want to substitute one of these for a different-sized one.
};
-ArrayRef<TargetInfo::GCCRegAlias> AArch64TargetInfo::getGCCRegAliases() const {
- return GCCRegAliases;
+void AArch64TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
const Builtin::Info AArch64TargetInfo::BuiltinInfo[] = {
@@ -5573,8 +5607,10 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::CharPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
const char *getClobbers() const override {
return "";
}
@@ -5656,8 +5692,10 @@ const char * const HexagonTargetInfo::GC
"sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
};
-ArrayRef<const char *> HexagonTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
@@ -5667,8 +5705,10 @@ const TargetInfo::GCCRegAlias HexagonTar
{ { "lr" }, "r31" },
};
-ArrayRef<TargetInfo::GCCRegAlias> HexagonTargetInfo::getGCCRegAliases() const {
- return GCCRegAliases;
+void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
@@ -5723,8 +5763,10 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override {
// FIXME: Implement!
@@ -5753,8 +5795,10 @@ const char * const SparcTargetInfo::GCCR
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
-ArrayRef<const char *> SparcTargetInfo::getGCCRegNames() const {
- return GCCRegNames;;
+void SparcTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
const TargetInfo::GCCRegAlias SparcTargetInfo::GCCRegAliases[] = {
@@ -5792,8 +5836,10 @@ const TargetInfo::GCCRegAlias SparcTarge
{ { "i7" }, "r31" },
};
-ArrayRef<TargetInfo::GCCRegAlias> SparcTargetInfo::getGCCRegAliases() const {
- return GCCRegAliases;
+void SparcTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
// SPARC v8 is the 32-bit mode selected by Triple::sparc.
@@ -5929,10 +5975,13 @@ public:
NumRecords = clang::SystemZ::LastTSBuiltin-Builtin::FirstTSBuiltin;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
// No aliases.
- return None;
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override;
@@ -6017,8 +6066,10 @@ const char *const SystemZTargetInfo::GCC
"f8", "f10", "f12", "f14", "f9", "f11", "f13", "f15"
};
-ArrayRef<const char *> SystemZTargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void SystemZTargetInfo::getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
bool SystemZTargetInfo::
@@ -6087,10 +6138,13 @@ public:
bool hasFeature(StringRef Feature) const override {
return Feature == "msp430";
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
// No aliases.
- return None;
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override {
@@ -6118,8 +6172,10 @@ const char *const MSP430TargetInfo::GCCR
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"};
-ArrayRef<const char *> MSP430TargetInfo::getGCCRegNames() const {
- return GCCRegNames;
+void MSP430TargetInfo::getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const {
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
// LLVM and Clang cannot be used directly to output native binaries for
@@ -6185,14 +6241,14 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override { return None; }
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override {}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override {
return true;
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
- }
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {}
};
class BPFTargetInfo : public TargetInfo {
@@ -6233,15 +6289,19 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override {
- return None;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override {
+ Names = nullptr;
+ NumNames = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override {
return true;
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
+ Aliases = nullptr;
+ NumAliases = 0;
}
};
@@ -6397,7 +6457,8 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override {
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override {
static const char *const GCCRegNames[] = {
// CPU register names
// Must match second column of GCCRegAliases
@@ -6422,9 +6483,11 @@ public:
"$msair", "$msacsr", "$msaaccess", "$msasave", "$msamodify",
"$msarequest", "$msamap", "$msaunmap"
};
- return GCCRegNames;
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override = 0;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override = 0;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
switch (*Name) {
@@ -6603,7 +6666,8 @@ public:
else
llvm_unreachable("Invalid ABI for Mips32.");
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
{ { "at" }, "$1" },
{ { "v0" }, "$2" },
@@ -6637,7 +6701,8 @@ public:
{ { "fp","$fp" }, "$30" },
{ { "ra" }, "$31" }
};
- return GCCRegAliases;
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
};
@@ -6757,7 +6822,8 @@ public:
else
llvm_unreachable("Invalid ABI for Mips64.");
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
{ { "at" }, "$1" },
{ { "v0" }, "$2" },
@@ -6791,7 +6857,8 @@ public:
{ { "fp","$fp" }, "$30" },
{ { "ra" }, "$31" }
};
- return GCCRegAliases;
+ Aliases = GCCRegAliases;
+ NumAliases = llvm::array_lengthof(GCCRegAliases);
}
bool hasInt128Type() const override { return true; }
@@ -6875,8 +6942,10 @@ public:
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::PNaClABIBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const override;
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
return false;
@@ -6887,12 +6956,16 @@ public:
}
};
-ArrayRef<const char *> PNaClTargetInfo::getGCCRegNames() const {
- return None;
+void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const {
+ Names = nullptr;
+ NumNames = 0;
}
-ArrayRef<TargetInfo::GCCRegAlias> PNaClTargetInfo::getGCCRegAliases() const {
- return None;
+void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const {
+ Aliases = nullptr;
+ NumAliases = 0;
}
// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
@@ -6934,11 +7007,15 @@ public:
return TargetInfo::PNaClABIBuiltinVaList;
}
const char *getClobbers() const override { return ""; }
- ArrayRef<const char *> getGCCRegNames() const override {
- return None;
- }
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override {
+ Names = nullptr;
+ NumNames = 0;
+ }
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
@@ -7024,11 +7101,15 @@ private:
// TODO: Implement va_list properly.
return VoidPtrBuiltinVaList;
}
- ArrayRef<const char *> getGCCRegNames() const final {
- return None;
- }
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const final {
- return None;
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const final {
+ Names = nullptr;
+ NumNames = 0;
+ }
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const final {
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool
validateAsmConstraint(const char *&Name,
@@ -7137,14 +7218,14 @@ public:
void getTargetBuiltins(const Builtin::Info *&Records,
unsigned &NumRecords) const override {}
const char *getClobbers() const override { return ""; }
- ArrayRef<const char *> getGCCRegNames() const override { return None; }
+ void getGCCRegNames(const char *const *&Names,
+ unsigned &NumNames) const override {}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &info) const override {
return true;
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
- }
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {}
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
@@ -7222,15 +7303,19 @@ public:
const char *getClobbers() const override {
return "";
}
- ArrayRef<const char *> getGCCRegNames() const override {
+ void getGCCRegNames(const char * const *&Names,
+ unsigned &NumNames) const override {
static const char * const GCCRegNames[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "cp", "dp", "sp", "lr"
};
- return GCCRegNames;
+ Names = GCCRegNames;
+ NumNames = llvm::array_lengthof(GCCRegNames);
}
- ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
- return None;
+ void getGCCRegAliases(const GCCRegAlias *&Aliases,
+ unsigned &NumAliases) const override {
+ Aliases = nullptr;
+ NumAliases = 0;
}
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
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