Sure, but if someone is planning on doing this for ARM there's some work in the ARM TargetInfo that needs to be done :)
-eric On Fri, Oct 16, 2015 at 3:24 PM Justin Bogner <m...@justinbogner.com> wrote: > Looks like we'll need "and" for ARM's builtins as well - several require > things like neon+fp16 or neon+vfp4. > > Eric Christopher <echri...@gmail.com> writes: > > Right. My current direction is going to be: > > > > "foo+bar" we can represent as "and" > > "foo,bar" we'll continue to represent as "or" > > > > this will lead to things like (possibly): > > > > "foo+bar, baz" - "either foo and bar, or baz." > > > > -eric > > > > On Fri, Oct 16, 2015 at 11:41 AM Justin Bogner <m...@justinbogner.com> > > wrote: > > > >> Hm. Well, supporting both "and" and "or" combinations here sounds like > >> an unpleasant path to go down. I guess the question is, which is > >> weirder? > >> > >> - With fma, we have fma4 which is basically a synonym as far as > >> intrinsics go - some chips have 3-argument versions and some have 4, > >> but I don't think any of the intrinsics reflect that. > >> > >> - With avx512, we have combinations of features which introduce new > >> intrinsics, since the supported elements and supported vector types > >> are more or less orthogonal. > >> > >> I guess the fma situation is easier to special case if we want to avoid > >> having to parse expressions here. Ie, we could have some kind of > >> meta-feature that expands to "fma or fma4". Of course, the obvious name > >> for that is "fma", which means fma3 today... > >> > >> Eric Christopher via cfe-commits <cfe-commits@lists.llvm.org> writes: > >> > Lovely. Cc'ing Justin here. We'll need to figure out some change for > >> these > >> > builtins here if we need to have and as well as or. > >> > > >> > (Why on earth are these builtins subject to two separate features? > *sigh* > >> > It's ridiculous.) > >> > > >> > -eric > >> > > >> > On Thu, Oct 15, 2015 at 11:59 PM Craig Topper <craig.top...@gmail.com > > > >> > wrote: > >> > > >> >> Correct you avx512vl means it support 128 and 256-bit vectors. > avx512bw > >> >> means it supports byte and word elements. So you actually need both. > >> >> > >> >> On Thu, Oct 15, 2015 at 11:57 PM, Eric Christopher < > echri...@gmail.com> > >> >> wrote: > >> >> > >> >>> The comma separated list is currently represented as "one of > these". I > >> >>> couldn't parse your first sentence, for the avx512 ones are you > saying > >> that > >> >>> it requires both and not just one of the options? > >> >>> > >> >>> -eric > >> >>> > >> >>> On Thu, Oct 15, 2015 at 11:55 PM Craig Topper < > craig.top...@gmail.com> > >> >>> wrote: > >> >>> > >> >>>> So for the AVX512 ones that list 2 features those features are both > >> >>>> required, but for FMA you need either one of the features but not > >> both. > >> >>>> What is the comma separated list currently implemented as? > >> >>>> > >> >>>> On Thu, Oct 15, 2015 at 3:46 PM, Eric Christopher via cfe-commits < > >> >>>> cfe-commits@lists.llvm.org> wrote: > >> >>>> > >> >>>>> Author: echristo > >> >>>>> Date: Thu Oct 15 17:46:02 2015 > >> >>>>> New Revision: 250470 > >> >>>>> > >> >>>>> URL: http://llvm.org/viewvc/llvm-project?rev=250470&view=rev > >> >>>>> Log: > >> >>>>> Fix the subtarget features required by some x86 builtins. > >> >>>>> > >> >>>>> Update the fma builtins to be fma/fma4 until some we can find some > >> >>>>> documentation either way. > >> >>>>> > >> >>>>> Update a couple of the avx intrinsics because they were in the > wrong > >> >>>>> category. > >> >>>>> > >> >>>>> Modified: > >> >>>>> cfe/trunk/include/clang/Basic/BuiltinsX86.def > >> >>>>> > >> >>>>> Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def > >> >>>>> URL: > >> >>>>> > >> > http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=250470&r1=250469&r2=250470&view=diff > >> >>>>> > >> >>>>> > >> > ============================================================================== > >> >>>>> --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) > >> >>>>> +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Oct 15 > 17:46:02 > >> >>>>> 2015 > >> >>>>> @@ -718,38 +718,38 @@ TARGET_BUILTIN(__builtin_ia32_sha256msg1 > >> >>>>> TARGET_BUILTIN(__builtin_ia32_sha256msg2, "V4iV4iV4i", "", "sha") > >> >>>>> > >> >>>>> // FMA > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddps, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddpd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddss, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddsd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubps, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubpd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubss, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubsd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddps, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddpd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddss, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddsd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubps, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubpd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubss, "V4fV4fV4fV4f", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubsd, "V2dV2dV2dV2d", "", > "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddsubps, "V4fV4fV4fV4f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd, "V2dV2dV2dV2d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubaddps, "V4fV4fV4fV4f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd, "V2dV2dV2dV2d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddps256, "V8fV8fV8fV8f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddpd256, "V4dV4dV4dV4d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubps256, "V8fV8fV8fV8f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubpd256, "V4dV4dV4dV4d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddps256, "V8fV8fV8fV8f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmaddpd256, "V4dV4dV4dV4d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubps256, "V8fV8fV8fV8f", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfnmsubpd256, "V4dV4dV4dV4d", "", > >> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddsubps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubaddps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddps, "V4fV4fV4fV4f", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddpd, "V2dV2dV2dV2d", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddss, "V4fV4fV4fV4f", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddsd, "V2dV2dV2dV2d", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubps, "V4fV4fV4fV4f", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubpd, "V2dV2dV2dV2d", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubss, "V4fV4fV4fV4f", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubsd, "V2dV2dV2dV2d", "", > >> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddps, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddpd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddss, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddsd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubps, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubpd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubss, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubsd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddsubps, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubaddps, "V4fV4fV4fV4f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd, "V2dV2dV2dV2d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmaddpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfnmsubpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddsubps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmaddsubpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubaddps256, "V8fV8fV8fV8f", "", > >> >>>>> "fma,fma4") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_vfmsubaddpd256, "V4dV4dV4dV4d", "", > >> >>>>> "fma,fma4") > >> >>>>> > >> >>>>> TARGET_BUILTIN(__builtin_ia32_vfmaddpd128_mask, "V2dV2dV2dV2dUc", > >> "", > >> >>>>> "avx512vl") > >> >>>>> TARGET_BUILTIN(__builtin_ia32_vfmaddpd128_mask3, > "V2dV2dV2dV2dUc", > >> "", > >> >>>>> "avx512vl") > >> >>>>> @@ -952,8 +952,8 @@ TARGET_BUILTIN(__builtin_ia32_cmpps256_m > >> >>>>> TARGET_BUILTIN(__builtin_ia32_cmpps128_mask, "UcV4fV4fIiUc", > "", > >> >>>>> "avx512vl") > >> >>>>> > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpeqb512_mask, "LLiV64cV64cLLi", > "", > >> >>>>> "avx512bw") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_pcmpeqd512_mask, "sV16iV16is", "", > >> >>>>> "avx512bw") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_pcmpeqq512_mask, "cV8LLiV8LLic", > "", > >> >>>>> "avx512bw") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_pcmpeqd512_mask, "sV16iV16is", "", > >> >>>>> "avx512f") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_pcmpeqq512_mask, "cV8LLiV8LLic", > "", > >> >>>>> "avx512f") > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpeqw512_mask, "iV32sV32si", "", > >> >>>>> "avx512bw") > >> >>>>> > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpeqb256_mask, "iV32cV32ci", "", > >> >>>>> "avx512vl,avx512bw") > >> >>>>> @@ -966,8 +966,8 @@ TARGET_BUILTIN(__builtin_ia32_pcmpeqq128 > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpeqw128_mask, "cV8sV8sc", "", > >> >>>>> "avx512vl,avx512bw") > >> >>>>> > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpgtb512_mask, "LLiV64cV64cLLi", > "", > >> >>>>> "avx512bw") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_pcmpgtd512_mask, "sV16iV16is", "", > >> >>>>> "avx512bw") > >> >>>>> -TARGET_BUILTIN(__builtin_ia32_pcmpgtq512_mask, "cV8LLiV8LLic", > "", > >> >>>>> "avx512bw") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_pcmpgtd512_mask, "sV16iV16is", "", > >> >>>>> "avx512f") > >> >>>>> +TARGET_BUILTIN(__builtin_ia32_pcmpgtq512_mask, "cV8LLiV8LLic", > "", > >> >>>>> "avx512f") > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpgtw512_mask, "iV32sV32si", "", > >> >>>>> "avx512bw") > >> >>>>> > >> >>>>> TARGET_BUILTIN(__builtin_ia32_pcmpgtb256_mask, "iV32cV32ci", "", > >> >>>>> "avx512vl,avx512bw") > >> >>>>> > >> >>>>> > >> >>>>> _______________________________________________ > >> >>>>> cfe-commits mailing list > >> >>>>> cfe-commits@lists.llvm.org > >> >>>>> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits > >> >>>>> > >> >>>> > >> >>>> > >> >>>> > >> >>>> -- > >> >>>> ~Craig > >> >>>> > >> >>> > >> >> > >> >> > >> >> -- > >> >> ~Craig > >> >> > >> > _______________________________________________ > >> > cfe-commits mailing list > >> > cfe-commits@lists.llvm.org > >> > http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits > >> >
_______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits