Author: echristo
Date: Thu Oct 8 15:10:14 2015
New Revision: 249732
URL: http://llvm.org/viewvc/llvm-project?rev=249732&view=rev
Log:
Migrate most feature map inclusion to initFeatureMap for the x86 target so
that we can build up an accurate set of features rather than relying on
TargetInfo initialization via handleTargetFeatures to munge the list
of features.
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/CodeGen/attr-target-x86.c
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=249732&r1=249731&r2=249732&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu Oct 8 15:10:14 2015
@@ -2705,7 +2705,27 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "cx16", true);
break;
}
- return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
+ if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec))
+ return false;
+
+ // Can't do this earlier because we need to be able to explicitly enable
+ // or disable these features and the things that they depend upon.
+
+ // Enable popcnt if sse4.2 is enabled and popcnt is not explicitly disabled.
+ auto I = Features.find("sse4.2");
+ if (I != Features.end() && I->getValue() == true &&
+ std::find(FeaturesVec.begin(), FeaturesVec.end(), "-popcnt") ==
+ FeaturesVec.end())
+ Features["popcnt"] = true;
+
+ // Enable prfchw if 3DNow! is enabled and prfchw is not explicitly disabled.
+ I = Features.find("3dnow");
+ if (I != Features.end() && I->getValue() == true &&
+ std::find(FeaturesVec.begin(), FeaturesVec.end(), "-prfchw") ==
+ FeaturesVec.end())
+ Features["prfchw"] = true;
+
+ return true;
}
void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features,
@@ -2974,22 +2994,6 @@ bool X86TargetInfo::handleTargetFeatures
XOPLevel = std::max(XOPLevel, XLevel);
}
- // Enable popcnt if sse4.2 is enabled and popcnt is not explicitly disabled.
- // Can't do this earlier because we need to be able to explicitly enable
- // popcnt and still disable sse4.2.
- if (!HasPOPCNT && SSELevel >= SSE42 &&
- std::find(Features.begin(), Features.end(), "-popcnt") ==
Features.end()){
- HasPOPCNT = true;
- Features.push_back("+popcnt");
- }
-
- // Enable prfchw if 3DNow! is enabled and prfchw is not explicitly disabled.
- if (!HasPRFCHW && MMX3DNowLevel >= AMD3DNow &&
- std::find(Features.begin(), Features.end(), "-prfchw") ==
Features.end()){
- HasPRFCHW = true;
- Features.push_back("+prfchw");
- }
-
// LLVM doesn't have a separate switch for fpmath, so only accept it if it
// matches the selected sse level.
if (FPMath == FP_SSE && SSELevel < SSE1) {
Modified: cfe/trunk/test/CodeGen/attr-target-x86.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target-x86.c?rev=249732&r1=249731&r2=249732&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/attr-target-x86.c (original)
+++ cfe/trunk/test/CodeGen/attr-target-x86.c Thu Oct 8 15:10:14 2015
@@ -29,7 +29,7 @@ int __attribute__((target("no-aes, arch=
// CHECK: qux{{.*}} #1
// CHECK: qax{{.*}} #4
// CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2"
-// CHECK: #1 = {{.*}}"target-cpu"="ivybridge"
"target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+pclmul,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
+// CHECK: #1 = {{.*}}"target-cpu"="ivybridge"
"target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
// CHECK: #2 = {{.*}}"target-cpu"="x86-64"
"target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop"
-// CHECK: #3 = {{.*}}"target-cpu"="x86-64"
"target-features"="+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
-// CHECK: #4 = {{.*}}"target-cpu"="ivybridge"
"target-features"="+avx,+cx16,+f16c,+fsgsbase,+pclmul,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,-aes"
+// CHECK: #3 = {{.*}}"target-cpu"="x86-64"
"target-features"="+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
+// CHECK: #4 = {{.*}}"target-cpu"="ivybridge"
"target-features"="+avx,+cx16,+f16c,+fsgsbase,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,-aes"
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