also, a 2.5ghz, 16 core chip was open sourced last month. https://www.cnx-software.com/2021/10/20/alibaba-open-source-risc-v-cores-xuantie-e902-e906-c906-and-c910/
On Tue, Nov 30, 2021 at 4:23 PM Dave Taht <dave.t...@gmail.com> wrote: > > On Tue, Nov 30, 2021 at 2:52 PM David P. Reed <dpr...@deepplum.com> wrote: > > > > For what? > > Because it's shiny. Because I don't care for the owner of softbank and > arm very much. Because at least the core is open source, and I'd > really like to try out some long held ideas about reducing context > switch latency. And there's a couple instructions I'd like to add. > > >I have recently gotten a MicroSemi RISC-V SoC board with embedded FPGA (or > >maybe it is better thought of as an FPGA board with multicore hard logic > >RISC-V host.) Runs Linux very fast. It's not set up to be a router, though - > >not unless I populate its PCIe slot with NICs. Standard Linux drivers for > >PCIe devices all work quite well, so far. > > how fast can it context switch? (irtt bench) > > I am impressed that it works with anything on pcie. > > I was mostly dismissing risc-v as a toy that could never catch up to > arm 3 years ago, but with the enormous chinese investment in it... > > > > > > > These early 64 bit RISC-V implementations are pretty darn good, but unlike > > Intel's Xeons, they don't yet handle memory channel performance very well. > > Intel has always had an advantage in on-chip cache. > > > > > > > > > (The 32-bit RISC-V's are really competing with ARM based microcontrollers > > for embedded systems. I don't find them interesting, though I have a couple > > sample boards with 32 bit RISC-V cores). > > I don't find 32 bit risc-v interesting. I did fiddle with the 128 bit > risc-v stuff for a while. > > > > > > > A random guess on my part: even consumer routers will be moving to 64-bit > > processor designs in the next couple years. > > Many already have. > > > That's because the price difference is getting quite small, as a percentage > > of total product cost, and because it is hard to buy "small memory address > > space" DIMMs. I could be wrong, but extrapolation from today's trends > > suggests that is more likely than not. > > 802.11ax standards require - no joke - a 2MByte buffer per station. > > > > > > > > > > > > > On Friday, November 26, 2021 3:02pm, "Dave Taht" <dave.t...@gmail.com> said: > > > > > has anyone tried the latest generations of risc-v? > > > > > > https://linuxgizmos.com/17-sbc-runs-linux-on-allwinner-d1-risc-v-soc/ > > > > > > -- > > > I tried to build a better future, a few times: > > > https://wayforward.archive.org/?site=https%3A%2F%2Fwww.icei.org > > > > > > Dave Täht CEO, TekLibre, LLC > > > _______________________________________________ > > > Cerowrt-devel mailing list > > > Cerowrt-devel@lists.bufferbloat.net > > > https://lists.bufferbloat.net/listinfo/cerowrt-devel > > > > > > > -- > I tried to build a better future, a few times: > https://wayforward.archive.org/?site=https%3A%2F%2Fwww.icei.org > > Dave Täht CEO, TekLibre, LLC -- I tried to build a better future, a few times: https://wayforward.archive.org/?site=https%3A%2F%2Fwww.icei.org Dave Täht CEO, TekLibre, LLC _______________________________________________ Cerowrt-devel mailing list Cerowrt-devel@lists.bufferbloat.net https://lists.bufferbloat.net/listinfo/cerowrt-devel
