Gedare Bloom pushed new commits to merge request !1108 Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
* a41583c3...ea1d5dcd - 2 commits from branch `main` * 83fcab98 - spec/build: add RISCV_USE_S_MODE option * b8490376 - riscv: support s-mode during boot * fd4f6d36 - bsps/riscv: support SMP secondary processors * fdb98294 - bsps/riscv: support s-mode timer in clock driver * 1bbfcd84 - bsps/riscv: support s-mode irq handling * 4e200089 - riscv: enable s-mode in CPU port * cf5356ab - cpukit/riscv: remove s/m prefix on frame context regs * fe1c0eae - riscv/riscv: refactor clock driver * 0a2a1c44 - riscv/riscv: add clock driver using stimecmp * f991a841 - riscv: support CPU counter in s-mode * e5b3bd28 - riscv: use software irq in tm27 with s-mode * 0665b217 - riscv: avoid accessing per_cpu mtime variable in s-mode * bc926f7a - riscv/riscv: support s-mode IRQ handling * cd00af18 - riscv/riscv: support using SBI timer in s-mode * 98f9a911 - riscv/riscv: use shutdown SBI in s-mode * de3e2301 - riscv/riscv: s-mode booting with SMP * ce4844c8 - riscv/riscv: remove RISCV_FATAL_CLOCK_SMP_INIT -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108 You're receiving this email because of your account on gitlab.rtems.org.
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