URL:
<http://savannah.gnu.org/bugs/?51434>
Summary: Document that variables are treated differently in
prerequisite lists and recipes
Project: make
Submitted by: None
Submitted on: Mon 10 Jul 2017 02:11:04 PM UTC
Severity: 3 - Normal
Item Group: Documentation
Status: None
Privacy: Public
Assigned to: None
Open/Closed: Open
Discussion Lock: Any
Component Version: None
Operating System: POSIX-Based
Fixed Release: None
Triage Status: None
_______________________________________________________
Details:
The same variable is expanded at different times depending on whether it is
used in a pre-requisites list or a recipe but this counter-intuitive
difference is not documented anywhere. It is the same for both "flavors" of
variables.
Consider the following example
VARS=a.c b.c
p: $(VARS)
echo i am using $(VARS) to build
echo $(VARS) > p
VARS=x.c y.c
Here $(VARS) in the prerequisite list is expanded when make reads that line of
the file (to "a.c b.c") but the $(VARS) in the recipe on the next line is
expanded to its value at the end of the makefile (here "x.c y.c")
A demonstration of the effect using the above example follows. In summary it
builds p using x.c and y.c but build is triggered when a.c and b.c are
touched
[x@m1 temp/make.vars]$ make
echo i am using x.c y.c to build
i am using x.c y.c to build
echo x.c y.c > p
[x@m1 temp/make.vars]$ touch x.c
[x@m1 temp/make.vars]$ make
make: `p' is up to date.
[x@m1 temp/make.vars]$ touch b.c
[x@m1 temp/make.vars]$ make
echo i am using x.c y.c to build
i am using x.c y.c to build
echo x.c y.c > p
[x@m1 temp/make.vars]$ vi
[x@m1 temp/make.vars]$ make --version
GNU Make 3.82
Built for i386-redhat-linux-gnu
Copyright (C) 2010 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
[x@m1 temp/make.vars]$
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