On Wed, 2013-04-03 at 21:24 -0500, Roger Pepitone wrote:
>
> TEST_TEXTS := test1.txt test2.txt test3.txt
> $(TEST_TEXTS) : xtest.txt
> echo "Rebuilding $@"
> touch $(TEST_TEXTS)
> xtest: $(TEST_TEXTS)
> ######################################
>
> make clean-xtest
> make xtest
> touch xtest.txt
> make xtest
> The first call to "make xtest" runs the rule 3 times, even
> though it should only need to do it once.
> The second call correctly only runs it once.
This is expected behavior. A rule like:
foo bar:
@echo $@
is exactly the same thing, to make, as writing:
foo:
@echo $@
bar:
@echo $@
It's just a shorthand for writing a lot of identical rules; it does NOT
mean that a single invocation if the rule will generate all three
targets, which is what you are expecting.
There is no way, in make, to get the behavior you want with explicit
rules other than using a separate "sentinal" target, like this:
.build_test_texts : xtest.txt
echo "Rebuilding $@"
touch $(TEST_TEXTS)
touch .build_test_texts
xtest: .build_test_texts
Of course this has its own issues, because make is not linking the
targets directly. So for example, if you run make then delete one of
the targets then run make again, it won't be recreated.
If you have a naming convention that lets you write a pattern rule, then
you can do this more directly because pattern rules, unlike explicit
rules, DO allow multiple targets to be created from a single invocation
of the command script. For instance, given your example this:
%1.txt %2.txt %3.txt : x%.txt
echo "Rebuilding $@"
touch $(TEST_TEXTS)
xtest: $(TEST_TEXTS)
will work as you expect.
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