That's the expected behavior...
Your code below is equivalent to:
tmp1=$(obj)
tmp2=$(word 1,$(obj))
Try it yourself:
makefile:
all: ; @#
$(info $(word 1,$$(foo))
-Rob
On 5/21/2012 9:24 AM, Incarnation Lee wrote:
I am improving my codes which managed by gnu make recently. And I
found a behavior of make buildin function when handling strings. I
assume that this maybe for some specific situations. My OS is Ubuntu
12.04 and with gnu make v.3.81. Details list follow:
obj=a.o b.o c.o
define Test
tmp1=$(word 1, $$(obj))
endef
$(eval $(call Test))
tmp2=$(word 1,$(obj))
echo $(tmp1)
echo $(tmp2)
do make -n
and get the result
a.o b.o c.o(tmp1)
a.o(tmp2)
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