URL:
<http://savannah.gnu.org/bugs/?23928>
Summary: Add MAKEFILE variable
Project: make
Submitted by: None
Submitted on: Thursday 07/24/2008 at 13:35 UTC
Severity: 3 - Normal
Item Group: Enhancement
Status: None
Privacy: Public
Assigned to: None
Open/Closed: Open
Discussion Lock: Any
Component Version: 3.81
Operating System: None
Fixed Release: None
_______________________________________________________
Details:
It is often useful to recursively call the current makefile as
part of a rule. Sometimes rules are included from a different file. The
included file may not know the name of the make file used to start the make
process. Having a MAKEFILE variable would solve this.
File rules.mk:
---------------
foo:
make -f $(MAKEFILE) bar
bar:
echo hello
----------------
File GNUmakefile:
-----------------
include rules.mk
File Test.mk:
-----------------
include rules.mk
_______________________________________________________
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