To whom it concerns,

Please accept some input from someone who is not an expert on Makefiles
in general but who is trying to move a software development project from
Solaris to Linux.

This (important) software project is based on embedded software development
for a Hitachi H8 processor. The responsible Makefile must handle about 100
files (c- and header files) and we need to support 3 types of targets:

1. gpttsim    (simulated version that runs on Unix/Linux)
2. gptt       (debug version that runs in RAM with a debugger)
3. gpttflash  (final embedded code)

The Makefile for Solaris exists and runs correctly, and I make heavily
use of target dependent variables. During the Makefile conversion
from Solaris to Linux (for gnumake) I encountered a number of problems
which I initially thought was due to not being familiar with gnumake.

I read/studied the manual and ended up with a simplyfied Makefile
which is included here. This Makefile is indeed capable of making
2 targets, `sd' and `sddebug', and it dumps the object files of the
3 c-files in directory `objs' or `dbobjs', respectively.

So what's the problem?

Well, dependency checking does not work at all. For each time I
call make (without any changes to the source files), it recompiles
the 3 c-files.

My request: Please take a look at the Makefile and advise me how
to continue. I suspect that the use of `target specific variables'
in `dependency rules' have their limitations.

Thanks for your time,
Jean Kusters (j.kusters@scantech-id.com)
