Hi,
On 16/11/20 10:33 am, Samuel Thibault wrote:
> Did you already try wd1 rather than wd0?I have only tried wd0 to boot / but
> have tried wd1 in userspace and that works.
I have a patched QEMU for IDE sync cache atapi cmd and no AHCI controller by
default in q35, see attached.
I recall having issues with the driver without patching QEMU.
Perhaps this will help?
Damien
>From 2c672e1902757dcd202c58382dcfc0727217aafa Mon Sep 17 00:00:00 2001
From: Damien Zammit <dam...@zamaudio.com>
Date: Wed, 24 Jun 2020 20:14:48 +1000
Subject: [PATCH] No built-in AHCI on q35 && sync cache on IDE
---
hw/i386/pc_q35.c | 6 ++++--
hw/ide/atapi.c | 7 +++++++
hw/ide/core.c | 2 +-
hw/pci-host/q35.c | 4 ++--
include/hw/ide/internal.h | 3 +++
5 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index d37c425e22..a89aa11646 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -132,9 +132,9 @@ static void pc_q35_init(MachineState *machine)
ISABus *isa_bus;
int i;
ICH9LPCState *ich9_lpc;
- PCIDevice *ahci;
+ //PCIDevice *ahci;
ram_addr_t lowmem;
- DriveInfo *hd[MAX_SATA_PORTS];
+ //DriveInfo *hd[MAX_SATA_PORTS];
MachineClass *mc = MACHINE_GET_CLASS(machine);
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
@@ -281,6 +281,7 @@ static void pc_q35_init(MachineState *machine)
if (pcms->sata_enabled) {
/* ahci and SATA device, for q35 1 ahci controller is built-in */
+ /*XXXDZ no built in ahci
ahci = pci_create_simple_multifunction(host_bus,
PCI_DEVFN(ICH9_SATA1_DEV,
ICH9_SATA1_FUNC),
@@ -290,6 +291,7 @@ static void pc_q35_init(MachineState *machine)
g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
ide_drive_get(hd, ahci_get_num_ports(ahci));
ahci_ide_create_devs(ahci, hd);
+ */
} else {
idebus[0] = idebus[1] = NULL;
}
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index 17a9d635d8..b40cfcce78 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -1042,6 +1042,12 @@ static void cmd_seek(IDEState *s, uint8_t* buf)
ide_atapi_cmd_ok(s);
}
+static void cmd_sync_cache(IDEState *s, uint8_t* buf)
+{
+ ide_flush_cache(s);
+ ide_atapi_cmd_ok(s);
+}
+
static void cmd_start_stop_unit(IDEState *s, uint8_t* buf)
{
int sense;
@@ -1267,6 +1273,7 @@ static const struct AtapiCmd {
[ 0x25 ] = { cmd_read_cdvd_capacity, CHECK_READY },
[ 0x28 ] = { cmd_read, /* (10) */ CHECK_READY },
[ 0x2b ] = { cmd_seek, CHECK_READY | NONDATA },
+ [ 0x35 ] = { cmd_sync_cache, CHECK_READY | NONDATA },
[ 0x43 ] = { cmd_read_toc_pma_atip, CHECK_READY },
[ 0x46 ] = { cmd_get_configuration, ALLOW_UA },
[ 0x4a ] = { cmd_get_event_status_notification, ALLOW_UA },
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 689bb36409..779567ea9c 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -1089,7 +1089,7 @@ static void ide_flush_cb(void *opaque, int ret)
ide_set_irq(s->bus);
}
-static void ide_flush_cache(IDEState *s)
+void ide_flush_cache(IDEState *s)
{
if (s->blk == NULL) {
ide_flush_cb(s, 0);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 2bbc90b28f..7c82e963a9 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -576,7 +576,7 @@ static void mch_realize(PCIDevice *d, Error **errp)
/* if *disabled* show SMRAM to all CPUs */
memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",
mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE,
- MCH_HOST_BRIDGE_SMRAM_C_SIZE);
+ 0x50000);
memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
&mch->smram_region, 1);
memory_region_set_enabled(&mch->smram_region, true);
@@ -593,7 +593,7 @@ static void mch_realize(PCIDevice *d, Error **errp)
memory_region_set_enabled(&mch->smram, true);
memory_region_init_alias(&mch->low_smram, OBJECT(mch), "smram-low",
mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE,
- MCH_HOST_BRIDGE_SMRAM_C_SIZE);
+ 0x50000);
memory_region_set_enabled(&mch->low_smram, true);
memory_region_add_subregion(&mch->smram, MCH_HOST_BRIDGE_SMRAM_C_BASE,
&mch->low_smram);
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h
index 55da35d768..4466273381 100644
--- a/include/hw/ide/internal.h
+++ b/include/hw/ide/internal.h
@@ -646,4 +646,7 @@ IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
int ide_handle_rw_error(IDEState *s, int error, int op);
+/* hw/ide/core.c */
+void ide_flush_cache(IDEState *s);
+
#endif /* HW_IDE_INTERNAL_H */
--
2.13.1
