https://sourceware.org/bugzilla/show_bug.cgi?id=32813
--- Comment #3 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Andreas Abel from comment #2) > Yes, it causes issues in > https://github.com/andreas-abel/nanoBench/tree/master/tools/cpuBench, which > is the code that generates the benchmarks that are behind > https://www.uops.info/ > > Because of the first issue (missing REX prefix), the wrong instruction > variant is benchmarked. The second issue (32 vs 16-bit register) causes the > benchmarking script to fail (the data that this script uses to generate > benchmarks is based on Intel's https://github.com/intelxed/xed, which > defines the source operand as a 32-bit register). The processor behaviors of LSL ECX, EDX LSL RCX, RDX REX.W LSL ECX, EDX are identical. If the assembler behavior is unchanged, can you modify your script to generate the binary you need? Even if the assembler were changed, the behavior of existing assemblers would stay the same. -- You are receiving this mail because: You are on the CC list for the bug.
