https://sourceware.org/bugzilla/show_bug.cgi?id=26685
--- Comment #6 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Jan Beulich from comment #5) > (In reply to H.J. Lu from comment #4) > > This specific case came from > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97257 > > > > The address prefix changes the register operand in these instructions. > > (%rip) is a special case. > > Which address prefix? There's not enough data in that bug for me to > understand. But in any event, it's gcc producing wrong code then, and hence > the issue should be fixed there, rather than silently "correcting" ambiguous > code in gas. In these instructions, the 0x67 prefix applies to the address prefix. The address prefix should be extracted from the register operand, similar to if (i.tm.operand_types[0].bitfield.instance == Accum || i.operands == 1) { /* The address size override prefix changes the size of the first operand. */ if (flag_code == CODE_64BIT && i.op[0].regs->reg_type.bitfield.word) { as_bad (_("16-bit addressing unavailable for `%s'"), i.tm.name); return 0; } if ((flag_code == CODE_32BIT ? i.op[0].regs->reg_type.bitfield.word : i.op[0].regs->reg_type.bitfield.dword) && !add_prefix (ADDR_PREFIX_OPCODE)) return 0; } -- You are receiving this mail because: You are on the CC list for the bug.