https://sourceware.org/bugzilla/show_bug.cgi?id=24576
Bug ID: 24576
Summary: Feature request: error out when passed the same linker
script with -T and as an object file
Product: binutils
Version: 2.32
Status: UNCONFIRMED
Severity: enhancement
Priority: P2
Component: ld
Assignee: unassigned at sourceware dot org
Reporter: jwerner at chromium dot org
Target Milestone: ---
This is just a small feature request to help people notice mistakes. When using
Makefiles to build things, it's easy to write rules like:
linker_script.ld: linker_script.ld.S
<preprocess with CPP>
my.elf: $(myobjects) $(somelibrary) linker_script.ld
$(LD) $(LDFLAGS) -o $@ -T linker_script.ld $^
There's a subtle error in the above: sincer linker_script.ld is part of the
prerequisites, it will be part of the $^ variable expansion, despite already
being listed explicitly for the -T flag. This means the linker will both use it
as the default linker script and then use it again to "augment" that script.
This will often not lead to an obvious error but cause all kinds of subtle
hijinks with symbol placement. The resulting binary may still run and contain
hard to understand rare errors.
I don't think there could ever be a valid use case where you'd want to pass the
same file as an argument to -T and as an augment linker script later on, so
could you just add a check to error out somewhere if that happens? That could
save the people running into this a lot of headache.
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