https://sourceware.org/bugzilla/show_bug.cgi?id=21683
Bug ID: 21683
Summary: [avr] Support a pseudo-instruction to allow more
efficient GCC ISR prologues
Product: binutils
Version: unspecified
Status: NEW
Severity: enhancement
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: gjl at gcc dot gnu.org
Target Milestone: ---
Background: avr-gcc currently generated ISR prologues and epilogues less
efficient than possible. This is due to avr back-end design and decisions.
Solving this in avr-gcc alone would be inappropriately amount of work and
instability, maybe even reducing code performance in other places than ISRs.
This is the reason for why
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20296
is open for > 12 years now and has been suspended.
A comined GCC + GAS approach would be feasible, and this PR is the GAS part:
GAS implements a __gcc_isr pseudo-instruction which scans the code and emits
parts of ISR prologue and epilogue.
__gcc_isr 1: GAS will replace it by an ISR prologue chunk (at most 6 insns).
__gcc_isr 2: GAS will replace it by an ISR epilogue chunk (at most 5 insns).
__gcc_isr 0, Rx: Scan the code since the last prologue chunk and replace all
encountered prologue and epilogue chunks by appropriate code. Rx is general
purpose register.
During parse (md_assemble), prologue and epilogue chunks are represented as
rs_machine_dependent fragments. If "__gcc_isr 0, Rx" is seen, all
rs_machine_dependent fragments in the current chain are transformed into
ordinary rs_fill code fragments of then known fixed size.
After parse (md_pre_output_hook) a sanity check is performed which reports any
dangling chunks.
__gcc_isr is only available with the new command line option -mgcc-isr
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