https://sourceware.org/bugzilla/show_bug.cgi?id=21590
Bug ID: 21590
Summary: Arm assembler generates incorrect transformation from
ldr to movs
Product: binutils
Version: 2.27
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: manojgupta at google dot com
Target Milestone: ---
Created attachment 10126
--> https://sourceware.org/bugzilla/attachment.cgi?id=10126&action=edit
Arm input assembly
The attached file clone.S from glibc-2.23/sysdeps/unix/sysv/linux/arm/clone.S
is incorrectly handled in assembler from binutils 2.27.
In the good version:
3e: f41c 7f80 tst.w ip, #256 ; 0x100
42: 4f08 ldr r7, [pc, #32] ; (64 <__clone+0x64>)
44: bf14 ite ne
46: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff
Note that ite/movnew instructions depend on condition codes generated by tst.w.
bad version, ldr is replaced by movs:
3e: f41c 7f80 tst.w ip, #256 ; 0x100
42: 2714 movs r7, #20
44: bf14 ite ne
46: f04f 30ff movne.w r0, #4294967295 ; 0xffffffff
According to ARM assembly docs for MOV:
If S is specified, the instruction:
Updates the N and Z flags according to the result.
Can update the C flag during the calculation of Operand2.
Does not affect the V flag.
So movs incorrectly changes the condition flags generated by tst.w.
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