https://sourceware.org/bugzilla/show_bug.cgi?id=20754
--- Comment #2 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by H.J. Lu <h...@sourceware.org>: https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8b89fe14b522cd6e5d160ff17defa8ecec243b11 commit 8b89fe14b522cd6e5d160ff17defa8ecec243b11 Author: H.J. Lu <hjl.to...@gmail.com> Date: Thu Nov 3 09:13:01 2016 -0700 X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80 in 32-bit mode. gas/ PR binutils/20754 * testsuite/gas/i386/opcode.s: Add tests for opcode 0x82. * testsuite/gas/i386/opcode-intel.d: Updated. * testsuite/gas/i386/opcode.d: Likewise. opcodes/ PR binutils/20754 * i386-dis.c (REG_82): New. (X86_64_82_REG_0): Likewise. (X86_64_82_REG_1): Likewise. (X86_64_82_REG_2): Likewise. (X86_64_82_REG_3): Likewise. (X86_64_82_REG_4): Likewise. (X86_64_82_REG_5): Likewise. (X86_64_82_REG_6): Likewise. (X86_64_82_REG_7): Likewise. (dis386): Use REG_82. (reg_table): Add REG_82. (x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1, X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4, X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
