https://sourceware.org/bugzilla/show_bug.cgi?id=18826
Bug ID: 18826
Summary: REL vs RELA relocations by default in the ARM backend
Product: binutils
Version: 2.26 (HEAD)
Status: NEW
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: ramana at sourceware dot org
Target Milestone: ---
Given this testcase:
.arch armv7-a
.syntax unified
.text
movw r10, #:lower16:nshel_+268000
movt r10, #:upper16:nshel_+268000
.data
.global nshel_
.space 20000
nshel_:
.space 400000
$INSTALL/bin/arm-none-linux-gnueabihf-gcc -c /tmp/movw.s
/tmp/movw.s: Assembler messages:
/tmp/movw.s:6: Error: offset out of range
/tmp/movw.s:7: Error: offset out of range
Is there an easy way to choose RELA relocations on a particular relocation type
or at a particular architecture level ? I couldn't find an easy way to do this
as the choice in the arm backend happens to be based on "use_rel".
While we can work around this in the compiler by not allowing offsets > the
offset allowed, I consider it a bug in the assembler and linker that we are
unable to represent such constant offsets in symbol expressions in the
assembler purely because of a representation issue.
I note that in the ARM backend a number of sub-"targets" like vxworks and QNX
are already using RELA relocations by default which suggests to me that the
logic is already in there and reasonably safe (additionally I do see a check
for REL vs RELA in large parts of the backend).
Alternatively we could consider switching the backend to using RELA relocation
types but that's a task that may have a pretty big impact in terms of
correctness and I'm not sure how gold will deal with this sort of an issue
currently.
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