http://sourceware.org/bugzilla/show_bug.cgi?id=14190
Bug #: 14190
Summary: objdump 2.19 [avr 8] using -d, "lpm" without
post-increment incorrectly disassembled with "+"
Product: binutils
Version: 2.19
Status: NEW
Severity: normal
Priority: P2
Component: binutils
AssignedTo: unassig...@sourceware.org
ReportedBy: xarq...@gmail.com
Classification: Unclassified
Created attachment 6431
--> http://sourceware.org/bugzilla/attachment.cgi?id=6431
Assembler test file to show "lpm r2,Z" disassembling incorrectly
Hello,
I believe objdump -d (for AVR-8 architecture, any variant) incorrectly
dis-assembles the "lpm" instruction without post-increment of Z register with a
post-increment symbol ("+"). See the AVR Instruction Set manual LPM
description to see the three opcode variations (i, ii, and iii below). Opcode
varient (ii) should not post-increment Z.
Repro:
[Sample assembly file showing assembled listing]
> avr-as -aln -mmcu=atmega328p avr-objdump-bug.S -o avr-objdump-bug.o
1 0000 C895 lpm ; (i) implied opcode (r0,Z)
2 0002 0490 lpm r0,Z ; (ii) explicit without
post-increment
3 0004 0590 lpm r0,Z+ ; (iii) explicit with
post-increment
4 0006 2490 lpm r2,Z ; (ii) explicit without
post-increment
5 0008 2590 lpm r2,Z+ ; (iii) with post-increment
> avr-objdump -d avr-objdump-bug.o
avr-objdump-bug.o: file format elf32-avr
Disassembly of section .text:
00000000 <.text>:
0: c8 95 lpm
2: 04 90 lpm r0, Z+ [INCORRECT]
4: 05 90 lpm r0, Z+
6: 24 90 lpm r2, Z+ [INCORRECT]
8: 25 90 lpm r2, Z+
[NOTE: see how the op-codes differ between 2: and 4: and 6: and 8: (and I
believe are correct), but the instructions are disassembled the same. I
believe the x4 xx op-codes should not have a post-increment output on the
mnemonic.]
> avr-objdump -v
GNU objdump (WinAVR 20100110) 2.19
Thanks!
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