http://sourceware.org/bugzilla/show_bug.cgi?id=13964
Bug #: 13964
Summary: ARM libopcode force-thumb sticks on
Product: binutils
Version: 2.22
Status: NEW
Severity: normal
Priority: P2
Component: binutils
AssignedTo: unassig...@sourceware.org
ReportedBy: d...@treblig.org
Classification: Unclassified
Created attachment 6332
--> http://sourceware.org/bugzilla/attachment.cgi?id=6332
Test wrapper for ARM disassembly showing sticky force-thumb
If I call the libopcodes ARM disassembler for arch/subarch arm/arm and don't
pass any options it defaults to disassembling in ARM's normal 4byte opcode
format, if I pass the force-thumb option it disassembles in the more compact
2/4 byte thumb format - so far so good.
However, if I call the disassembler with force-thumb as an option, and then
call it again without the option it'll still use thumb mode - I don't think
this is intentional.
In src/opcodes/arm-dis.c:1650 we have:
static bfd_boolean force_thumb = FALSE;
Then in parse_arm_disassembler_option somewhere around line 4398 we have:
else if (CONST_STRNEQ (option, "force-thumb"))
force_thumb = 1;
else if (CONST_STRNEQ (option, "no-force-thumb"))
force_thumb = 0;
and that's the only places force_thumb are set; so once it's set by a
force-thumb, if you miss the option off it defaults differently - I believe
that if you call the disassembler twice with the same options it should do the
same thing, hence I say that force_thumb needs initialising in
parse_arm_disassembler_option or similar.
The following test is a demo of the bug; it currently outputs:
dg@major:~$ gcc disassbug.c -lbfd-2.22-multiarch -lopcodes-2.22-multiarch
dg@major:~$ ./a.out
Result is : svc 0x00001234 nprocessed=4
Result is : asrs r4, r6, #8 nprocessed=2
Result is : asrs r4, r6, #8 nprocessed=2
but I believe it should output:
Result is : svc 0x00001234 nprocessed=4
Result is : asrs r4, r6, #8 nprocessed=2
Result is : svc 0x00001234 nprocessed=4
given that the 1st and 3rd calls are done without force-thumb.
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