Chips derived from McKinley-core (Itanium 2, etc.) have an anomaly which can cause stalls if an F-unit instruction (including a NOP) is issued right after reading certain application registers (such as ar.bsp). Furthermore, power-considerations also argue against the use of F-unit instructions unless they're really needed.
Similarly, using B-unit NOPs is probably not a great idea for McKinley-derived cores: certain templates with B unit instructions cause split-issue and the BBB template in particular causes a branch-prediction anomaly (the first two branches are predicated based on the slot 0 hints. I'll attach a patch which appears to fix this problem. If it looks OK, please check it in. Note: the new policy won't be optimal for Itanium (Merced) chips. I don't think anyone will care. -- Summary: gas should avoid F-unit NOPs (and B-unit probably, too) Product: binutils Version: 2.17 (HEAD) Status: NEW Severity: normal Priority: P2 Component: gas AssignedTo: unassigned at sources dot redhat dot com ReportedBy: davidm at hpl dot hp dot com CC: bug-binutils at gnu dot org,hjl at lucon dot org GCC build triplet: ia64-linux GCC host triplet: ia64-linux GCC target triplet: ia64-linux http://sources.redhat.com/bugzilla/show_bug.cgi?id=803 ------- You are receiving this mail because: ------- You are on the CC list for the bug, or are watching someone who is. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils