Hi,

I'm having troubles getting a what seems to be a simple item to work
right..  Basically, I'm trying to search through a data structure and if
a hash value is eq a test value it has to add the test value to a hash
in a different branch of the data structure using the same key.  The
data structure consists of a bunch of hashes of hashes..

Here's the to legs of the stucture I'm concerned with:
${$pointer->{$module}{"sub_mod"}{$submodule}{$inst}{$port}} =
$connected_wire_on_port;    #(Branch 1)
${$pointer->{$module}{"used_by"}{$parent_module}{$inst}{$port}} =
$parentclk;                        #(Branch 2)

When I find the value I'm looking for down branch 1, I add it to branch
2.  But right after I do this anything else down branch 2(different
$inst) that had the same $port gets that same value..?  Any ideas?

Thanks.

Here's the sub in question:

sub add_clock {
   my($vnet) = pop @_;
   my($parent) = shift @_;
   my($sub_mod) = shift @_;
   my($inst) = shift @_;
   my($clk_port) = shift @_;
   print "Add Clock Data: $parent, $sub_mod, $inst, $clk_port\n";
   my($clock) = $vnet->{$parent}{"sub_mod"}{$sub_mod}{$inst}{$clk_port};

   $vnet->{$parent}{"clocks"}{$clock} ++;
   print "Added Parent Clock: $clock to $parent\n";
   for $tmp_sub_mod (keys %{$vnet->{$parent}{"sub_mod"}}) {
      print "  Scanning Parent Sub-Module: $tmp_sub_mod\n";
      for $tmp_inst (keys %{$vnet->{$parent}{"sub_mod"}{$tmp_sub_mod}})
{
         print "    Scanning Instance: $tmp_inst\n";
         while (($port, $wire) = each
%{$vnet->{$parent}{"sub_mod"}{$tmp_sub_mod}{$tmp_inst}}) {
            print "      Scanning Port: $port  Wire: $wire\n";
            if ($wire eq $clock) {
               &print_vnet;
               print "        Matched Wire: $wire  with   Clock:
$clock\n";
               print qq/
{$tmp_sub_mod}{"used_by"}{$parent}{$tmp_inst}{$port} = $clock\n/;

${$vnet->{$tmp_sub_mod}{"used_by"}{$parent}{$tmp_inst}}{$port} = $clock;

               &print_vnet;
               &stop;
               }
            }
         }
      }
   }

Here's a snippet of output from this sub (print_vnet just roles out the
data structure, stop is a break point):

Add Clock Data: cg_test_1, FL1S3ENV15, synth_cntl_reg_0A, CK
Added Parent Clock: CG_CLKOUT1 to cg_test_1
  Scanning Parent Sub-Module: FL1S3ENV15
    Scanning Instance: synth_cntl_reg_0A
      Scanning Port: Q  Wire: synth1_pwrdn
      Scanning Port: D0  Wire: Q_sync_16
      Scanning Port: CDN  Wire: ecoNet_ft345
      Scanning Port: D1  Wire: n6385
      Scanning Port: CK  Wire: CG_CLKOUT1

{FL1S3ENV15}{"used_by"}{cg_test_1}{synth_cntl_reg_0A}
{FL1S3ENV15}{"clocks"} = CK
{cg_test_1}{"sub_mod"}{FL1S3ENV15}{synth_cntl_reg_0A}{CK} = CG_CLKOUT1
{cg_test_1}{"sub_mod"}{FL1S2EQV15}{pwrdn_cnt_reg_15A}{CK} = xtal_clk
{cg_test_1}{"clocks"} = CG_CLKOUT1
{FL1S2EQV15}{"used_by"}{cg_test_1}{pwrdn_cnt_reg_15A}
{FL1S2EQV15}{"clocks"} = CK

        Matched Wire: CG_CLKOUT1  with   Clock: CG_CLKOUT1
          {FL1S3ENV15}{"used_by"}{cg_test_1}{synth_cntl_reg_0A}{CK} =
CG_CLKOUT1

{FL1S3ENV15}{"used_by"}{cg_test_1}{synth_cntl_reg_0A}{CK} = CG_CLKOUT1
{FL1S3ENV15}{"clocks"} = CK
{cg_test_1}{"sub_mod"}{FL1S3ENV15}{synth_cntl_reg_0A}{CK} = CG_CLKOUT1
{cg_test_1}{"sub_mod"}{FL1S2EQV15}{pwrdn_cnt_reg_15A}{CK} = xtal_clk
{cg_test_1}{"clocks"} = CG_CLKOUT1
{FL1S2EQV15}{"used_by"}{cg_test_1}{pwrdn_cnt_reg_15A}{CK} = CG_CLKOUT1
{FL1S2EQV15}{"clocks"} = CK

(Break Point)


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