Can Anyone Help me? my code can not change the output of pru ...
machinekit@beaglebone:~$ uname -a Linux beaglebone 4.19.26-bone-rt-r26 #1stretch PREEMPT RT Thu Feb 28 11:27:59 UTC 2019 armv7l GNU/Linux machinekit@beaglebone:~$ cat /boot/uEnv.txt #Docs: http://elinux.org/Beagleboard:U-boot_partitioning_layout_2.0 uname_r=4.19.26-bone-rt-r26 #uuid= #dtb= ###U-Boot Overlays### ###Documentation: http://elinux.org/Beagleboard:BeagleBoneBlack_Debian#U-Boot_Overlays ###Master Enable enable_uboot_overlays=1 ### ###Overide capes with eeprom #uboot_overlay_addr0=/lib/firmware/<file0>.dtbo #uboot_overlay_addr1=/lib/firmware/<file1>.dtbo #uboot_overlay_addr2=/lib/firmware/<file2>.dtbo #uboot_overlay_addr3=/lib/firmware/<file3>.dtbo ### ###Additional custom capes #uboot_overlay_addr4=/lib/firmware/<file4>.dtbo #uboot_overlay_addr5=/lib/firmware/<file5>.dtbo #uboot_overlay_addr6=/lib/firmware/<file6>.dtbo #uboot_overlay_addr7=/lib/firmware/<file7>.dtbo ### ###Custom Cape dtb_overlay=/lib/firmware/BBB-CNC-SHENKA-00A0.dtbo ### ###Disable auto loading of virtual capes (emmc/video/wireless/adc) disable_uboot_overlay_emmc=1 disable_uboot_overlay_video=1 disable_uboot_overlay_audio=1 disable_uboot_overlay_wireless=1 disable_uboot_overlay_adc=1 ### ###PRUSS OPTIONS ###pru_rproc (4.4.x-ti kernel) #uboot_overlay_pru=/lib/firmware/AM335X-PRU-RPROC-4-4-TI-00A0.dtbo ###pru_rproc (4.14.x-ti kernel) #uboot_overlay_pru=/lib/firmware/AM335X-PRU-RPROC-4-14-TI-00A0.dtbo ###pru_rproc (4.19.x-ti kernel) #uboot_overlay_pru=/lib/firmware/AM335X-PRU-RPROC-4-19-TI-00A0.dtbo ###pru_uio (4.4.x-ti, 4.14.x-ti, 4.19.x-ti & mainline/bone kernel) uboot_overlay_pru=/lib/firmware/AM335X-PRU-UIO-00A0.dtbo ### ###Cape Universal Enable enable_uboot_cape_universal=1 ### ###Debug: disable uboot autoload of Cape #disable_uboot_overlay_addr0=1 #disable_uboot_overlay_addr1=1 #disable_uboot_overlay_addr2=1 #disable_uboot_overlay_addr3=1 ### ###U-Boot fdt tweaks... (60000 = 384KB) #uboot_fdt_buffer=0x60000 ###U-Boot Overlays### cmdline=coherent_pool=1M net.ifnames=0 quiet #In the event of edid real failures, uncomment this next line: #cmdline=coherent_pool=1M net.ifnames=0 quiet video=HDMI-A-1:1024x768@60e #Use an overlayfs on top of a read-only root filesystem: #cmdline=coherent_pool=1M net.ifnames=0 quiet overlayroot=tmpfs ##enable Generic eMMC Flasher: ##make sure, these tools are installed: dosfstools rsync #cmdline=init=/opt/scripts/tools/eMMC/init-eMMC-flasher-v3.sh DTS: // Compile with: // sudo dtc -O dtb -I dts -o /lib/firmware/BBB-CNC-SHENKA-00A0.dtbo -b 0 -@ BBB-CNC-SHENKA-00A0.dts -W no-unit_address_vs_reg //sudo vim /boot/uEnv.txt //Custom Cape //dtb_overlay=/lib/firmware/PRU-GPIO-EXAMPLE-00A0.dtbo /dts-v1/; /plugin/; / { // This determines which boards can use this DTS overlay compatible = "ti,beaglebone", "ti,beaglebone-black"; part-number = "BBB-CNC-SHENKA"; version = "00A0"; /*Free up the pins used by the cape from the pinmux helpers.*/ fragment@0 { target = <&ocp>; __overlay__ { P8_07_pinmux { status = "disabled"; }; P8_08_pinmux { status = "disabled"; }; P8_09_pinmux { status = "disabled"; }; P8_10_pinmux { status = "disabled"; }; P8_11_pinmux { status = "disabled"; }; P8_12_pinmux { status = "disabled"; }; P8_13_pinmux { status = "disabled"; }; P8_14_pinmux { status = "disabled"; }; P8_15_pinmux { status = "disabled"; }; P8_16_pinmux { status = "disabled"; }; P8_17_pinmux { status = "disabled"; }; P8_20_pinmux { status = "disabled"; }; P8_21_pinmux { status = "disabled"; }; P8_27_pinmux { status = "disabled"; }; P8_28_pinmux { status = "disabled"; }; P8_29_pinmux { status = "disabled"; }; P8_30_pinmux { status = "disabled"; }; P8_39_pinmux { status = "disabled"; }; P8_40_pinmux { status = "disabled"; }; P8_41_pinmux { status = "disabled"; }; P8_42_pinmux { status = "disabled"; }; P8_43_pinmux { status = "disabled"; }; P8_44_pinmux { status = "disabled"; }; P8_45_pinmux { status = "disabled"; }; P8_46_pinmux { status = "disabled"; }; }; }; fragment@1 { target = <&ocp>; __overlay__ { cape-universal { status = "disabled"; }; }; }; fragment@2 { target = <&am33xx_pinmux>; __overlay__ { cnc_pins: pinmux_cnc_pins { pinctrl-single,pins = < 0x084 0x05 /*P8.20", /* pru1_pru_r30_13 S-DIR pin*/ 0x080 0x05 /*P8.21", /* pru1_pru_r30_12 S-Step pin*/ 0x0e0 0x05 /*P8.27", /* pru1_pru_r30_8 Spindle-PWM pin*/ 0x0e8 0x05 /*P8.28", /* pru1_pru_r30_10 C-DIR pin*/ 0x0e4 0x05 /*P8.29", /* pru1_pru_r30_9 C-Step pin*/ 0x0b8 0x05 /*P8.39", /* pru1_pru_r30_6 A-DIR pin*/ 0x0bc 0x05 /*P8.40", /* pru1_pru_r30_7 A-Step pin*/ 0x0b0 0x05 /*P8.41", /* pru1_pru_r30_4 Z-DIR pin*/ 0x0b4 0x05 /*P8.42", /* pru1_pru_r30_5 Z-Step pin*/ 0x0a8 0x05 /*P8.43", /* pru1_pru_r30_2 Y-DIR pin*/ 0x0ac 0x05 /*P8.44", /* pru1_pru_r30_3 Y-Step pin*/ 0x0a0 0x05 /*P8.45", /* pru1_pru_r30_0 X-DIR pin*/ 0x0a4 0x05 /*P8.46", /* pru1_pru_r30_1 X-Step pin*/ 0x00c 0x27 /*P8.06", /* gpio1.3 ESTOP pin*/ 0x090 0x27 /*P8.07", /* gpio2.2 ESTOP pin*/ 0x094 0x27 /*P8.08", /* gpio2.3 X-Limit pin*/ 0x09c 0x27 /*P8.09", /* gpio2.5 Y-Limit pin*/ 0x098 0x27 /*P8.10", /* gpio2.4 Z-Limit pin*/ 0x034 0x27 /*P8.11", /* gpio1.13 Probe pin*/ 0x030 0x27 /*P8.12", /* gpio2.22 input-mode7 pin*/ 0x024 0x27 /*P8.13", /* gpio0.23 input-mode7 pin*/ 0x028 0x27 /*P8.14", /* gpio0.26 input-mode7 pin*/ 0x03c 0x27 /*P8.15", /* gpio1.15 input-mode7 pin*/ 0x038 0x27 /*P8.16", /* gpio1.14 input-mode7 pin*/ 0x02c 0x27 /*P8.17", /* gpio0.27 input-mode7 pin*/ >; }; }; }; fragment@3 { target = <&ocp>; __overlay__ { cnc-shenka-pinset { compatible = "bone-pinmux-helper"; pinctrl-names = "default"; pinctrl-0 = <&cnc_pins>; status = "okay"; }; }; }; fragment@4 { target = <&pruss>; __overlay__ { status = "okay"; }; }; }; machinekit@beaglebone:~$ cat /sys/kernel/debug/pinctrl/44e10800.pinmux-pinctrl-single/pins registered pins: 142 pin 0 (PIN0) 44e10800 00000027 pinctrl-single pin 1 (PIN1) 44e10804 00000027 pinctrl-single pin 2 (PIN2) 44e10808 00000027 pinctrl-single pin 3 (PIN3) 44e1080c 00000027 pinctrl-single pin 4 (PIN4) 44e10810 00000027 pinctrl-single pin 5 (PIN5) 44e10814 00000027 pinctrl-single pin 6 (PIN6) 44e10818 00000027 pinctrl-single pin 7 (PIN7) 44e1081c 00000027 pinctrl-single pin 8 (PIN8) 44e10820 00000027 pinctrl-single pin 9 (PIN9) 44e10824 00000027 pinctrl-single pin 10 (PIN10) 44e10828 00000027 pinctrl-single pin 11 (PIN11) 44e1082c 00000027 pinctrl-single pin 12 (PIN12) 44e10830 00000027 pinctrl-single pin 13 (PIN13) 44e10834 00000027 pinctrl-single pin 14 (PIN14) 44e10838 00000027 pinctrl-single pin 15 (PIN15) 44e1083c 00000027 pinctrl-single pin 16 (PIN16) 44e10840 00000027 pinctrl-single pin 17 (PIN17) 44e10844 00000027 pinctrl-single pin 18 (PIN18) 44e10848 00000027 pinctrl-single pin 19 (PIN19) 44e1084c 00000027 pinctrl-single pin 32 (PIN32) 44e10880 00000005 pinctrl-single pin 33 (PIN33) 44e10884 00000005 pinctrl-single pin 34 (PIN34) 44e10888 00000037 pinctrl-single pin 35 (PIN35) 44e1088c 00000027 pinctrl-single pin 36 (PIN36) 44e10890 00000027 pinctrl-single pin 37 (PIN37) 44e10894 00000027 pinctrl-single pin 38 (PIN38) 44e10898 00000027 pinctrl-single pin 39 (PIN39) 44e1089c 00000027 pinctrl-single pin 40 (PIN40) 44e108a0 00000005 pinctrl-single pin 41 (PIN41) 44e108a4 00000005 pinctrl-single pin 42 (PIN42) 44e108a8 00000005 pinctrl-single pin 43 (PIN43) 44e108ac 00000005 pinctrl-single pin 44 (PIN44) 44e108b0 00000005 pinctrl-single pin 45 (PIN45) 44e108b4 00000005 pinctrl-single pin 46 (PIN46) 44e108b8 00000005 pinctrl-single pin 47 (PIN47) 44e108bc 00000005 pinctrl-single pin 56 (PIN56) 44e108e0 00000005 pinctrl-single pin 57 (PIN57) 44e108e4 00000005 pinctrl-single pin 58 (PIN58) 44e108e8 00000005 pinctrl-single TESTCode: .origin 0 .entrypoint START #define PRU0_ARM_INTERRUPT 19 #define CONST_PRUCFG C4 START: LBCO r0, CONST_PRUCFG, 4, 4 CLR r0, r0, 4 // Clear SYSCFG[STANDBY_INIT] to enable OCP master port SBCO r0, CONST_PRUCFG, 4, 4 clr r30, r30, 0 clr r30, r30, 1 clr r30, r30, 2 clr r30, r30, 3 clr r30, r30, 4 clr r30, r30, 5 clr r30, r30, 6 clr r30, r30, 7 clr r30, r30, 8 clr r30, r30, 9 clr r30, r30, 10 clr r30, r30, 12 clr r30, r30, 13 call delay set r30, r30, 0 set r30, r30, 1 set r30, r30, 2 set r30, r30, 3 set r30, r30, 4 set r30, r30, 5 set r30, r30, 6 set r30, r30, 7 set r30, r30, 8 set r30, r30, 9 set r30, r30, 10 set r30, r30, 12 set r30, r30, 13 // Send notification to Host for program completion MOV r31.b0, PRU0_ARM_INTERRUPT + 16 // Halt the processor halt delay: mov r0, 100000000 delay_loop: sub r0, r0, 1 qbne delay_loop, r0, 0 ret -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. 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