those mappings are correct

GPIO1_28 P9-12 U18  = mapping /sys/class/gpio60
GPIO1_16 P9-15 R13  = mapping /sys/class/gpio48


On 2/21/2018 12:18 PM, Drew Fustini wrote:
> On Wed, Feb 21, 2018 at 11:01 AM, David Lechner <da...@lechnology.com> wrote:
>> Are you sure your phandles are correct here? They don't match the comments.
>> Should it be <&gpio1 16 0> instead?
>>
>>> +                               reset-gpios = <&gpio1 16 0>; /*
>>> reset:60 P9.12 GPIO1_28 */
>>
>> And then <&gpio1 28 0> here?
> Here is the full BB-SPIDEV1-00A0.dts:
> https://gist.github.com/pdp7/aee5664598059c9b9a9020f107957f80
>
> I have P9.12 connected to LCD reset pin.  I have P9.15 connected to
> LCD dc pin.  For fbtft driver, this translated to GPIO_60 for reset
> and GPIO_48 for dc.  This is based on this pinout diagram:
> https://elinux.org/File:Cape_expansion_headers.PNG
>
> For this dts file, I was trying to figure out what appropriate gpio
> phandle.  I looked at this table for the P9 header:
> https://elinux.org/File:H9Pinout.PNG
>
> I believe that gpio1[16] corresponds to P9.15 which is LCD dc pin, and
> gpio1[28] corresponds to P9.12 which is LCD reset pin.
>
> My understanding of those mappings may be incorrect, so I'd appreciate
> any additional feedback.
>
> Thanks,
> Drew
>

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