Hi, all. My question is that:

I need to make use a Rom code's raw mode of reading its payloads from both 
SD cards and eMMC.
My question is whether the CH (Configuration Header) needed in this case?
TI's TRM on Sitara am335x states CH *must* be located at the sector #0,
and says it might be void (only containing a _disabled_ CHSETTINGS item),
but it is very unclear with respect of its size and offsets. and also it's 
not clear whether it's needed at all.
Quote:
"
*The raw mode is detected by reading sectors #0, #256, #512, #768.The 
content of these sectors is then verified for presence of a TOC structure 
as described in Section 26.1.9.*"

But section 26.1.9 even doesn't mention CH, just a GP header.
And the TRM on Sitara 572x states CH is optional for GP devices.

I mean, if I place my binary into LBA #0 (first sector) with the only GP 
header attached and no CH,
would the Rom code load it?

I can't use MBR/FAT mode, because there is GPT and PMBR there.

I wanted to learn this, and before bothering you, I checked eMMC content on 
BBB,
since TI's TRM states for embedded memories *ROM code doesn't use* MBR/FAT 
mode.
So on eMMC there should be a valid example of CH with TOC in the first 
sector. But on BBB, somehow,
and it is clearly seen, the FAT/MBR is used and there is no any TOC at all 
(first bytes
of the first sector are filled with zeros up to the Partition records). TRM 
states if the first
4 bytes are 0x00 or 0xFF this device is considererd as not containig the 
image to load:
Quote


*"The detection of whether an image is present or not on a selected device 
depends on the first few bytes.On a GP Device type a booting image is 
considered to be present when the first four bytes of the sector isnot 
equal to 0000 0000h or FFFF FFFFh."*

Maybe there are some knowledgeable people here,
tell me please, *is* CH needed (for the Romcode) in the raw mode for GP 
memory booting and
what its minimal content is? Because I cannot let it occupy the entire 512 
byte, only part
of the code block (first 440 bytes) of the Protective MBR may be used.

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