Hi Ralf,

Thank you for clearing it up!

Could you please explain how you deduced that *Logical Pin 48* is 
associated with *Physical Pin P8.37*? ( I do see in the table that P8.37 = 
lcd_data8, just not sure how you deduced that their Logical Pin number is 
48).

Thank you.

On Saturday, February 15, 2014 9:44:50 PM UTC+2, Ralf Roesch wrote:
>
> Matt,
>
> now it gets clearer. 
> You referred Pin 48 (cat pins), so I thought you checked against a new pin 
> with an other mode set.
>
> I think you mixed "GPIO pin" number with "logical pin" number.
>
> You are referring to P9.15 (= GPIO1_16 / gpmc_a0), which is Pin 48 
> But: Pin 48 is a GPIO pin number! 
> (each gpio group includes 32 pins, 48 is the sum of: 32 pins from group 0 
> + pin 16 of group 1)
>
> The associated logical pin for GPIO pin number 48 has number 16!
> So if you "cat pins" as before you get the interesting entry:
> pin 16 (44e10840) 00000027 pinctrl-single (mode 7)
> BTW offset 840h conf_gpmc_a0 can be found in the SRM.
>
> Logical Pin 48 is associated Pin P8.37 / lcd_data8 as I mentioned before.
>
> regards
> Ralf
>
>

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