In access register mode, the current instruction space is primary, so I do not see any inconsistency.
There is an exception to access register 0 designating the primary address space, in that for TEST ACCESS the actual contents of access register 0 are used, and a zero value simply gives a zero condition code. Jonathan Scott -----Original Message----- From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> On Behalf Of Seymour J Metz Sent: 03 September 2025 16:03 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Using (0) to suppress alignment checks in HLASM They say that the eyes are the third thing to go. PoOps is inconsistent; it says "Access register 0 always designates the current instruction space." but the instruction description explicitly says primary. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 עַם יִשְׂרָאֵל חַי נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר
