Hi, I am playing around with the 6.8 kernel code on a raspberry pi 4. Making small changes for learning and tinkering.
I am trying to find out the source of an interrupt which happens thousands of times per second. I believe it could just be a timer. I assume that the kernel uses GIC rather than the legacy interrupt controller. Is that correct? I see that there is code related to both in the source. I am familiar with the legacy interrupt controller but not with gic and I am only getting started with aarch64. The legacy controller seems to be able to show which interrupts are pending from its point of view. I know that it does not catch every interrupt source though, according to the bcm2711 docs that are available for the pi 4. The legacy controller shows no interrupts pending and I have disabled the aarch64 timers for the core I am looking at. I am on a secondary core. Can anyone give me an overview of how the interrupts are structured on the pi 4? I just need some small details, I think I can take it from there and do my digging. Specifically, which timers are sending interrupts and how are they routed to secondary cores? Thanks, Alessandro
