I added some debug lines to try to see what is happening.  I could not see
the dwxe clocks being turned on until I changed:

        /* Enable clock. */
//      clock_enable(faa->fa_node, "stmmaceth");
//      reset_deassert(faa->fa_node, "stmmaceth");
clock_enable_all(faa->fa_node);
reset_deassert_all(faa->fa_node);

I could not find any reference to stmmaceth.  I can now see one clock being
turned on:
#define H3_CLK_BUS_EMAC         27
        [H3_CLK_BUS_EMAC] = { 0x0060, 17, H3_CLK_AHB2 },

But not the physical clock:
#define H3_CLK_BUS_EPHY         67
        [H3_CLK_BUS_EPHY]  = { 0x0070, 0 },

>From the boot log:

dwxe0 at simplebus0
if_dwxe  phy-handle node: 0x588.
if_dwxe sc_phyloc: 0x1.
sxiccmu clock enable on: 1, reg: 0x60, bit: 17
sxiccmu clock reset assert: 0, reg: 0x2c0, bit: 17
: address 02:81:b1:07:76:5e
dwxe0: reset timeout
ukphy0 at dwxe0 phy 1: Generic IEEE 802.3u media interface, rev. 4: OUI
0x1e7240, model 0x0004
ifmedia_set: no match for 0x100/0xffffffffffffffff

I have cobbled together a dtb from an armbian distribution where the
ethernet works and the clocks match the entries in sxiccmu_clocks.h:
                ethernet@1c30000 {
                        compatible = "allwinner,sun8i-h3-emac";
                        syscon = <0x49>;
                        reg = <0x1c30000 0x104>;
                        interrupts = <0x0 0x52 0x4>;
                        resets = <0x2 0xc 0x2 0x27>;
                        reset-names = "ahb";
                        clocks = <0x2 0x1b 0x2 0x43>;
                        clock-names = "ahb";
                        pinctrl-names = "default";
                        pinctrl-0 = <0x48>;
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        status = "okay";
                        phy-handle = <0x47>;
                        phy-mode = "mii";
                        allwinner,leds-active-low;
                        linux,phandle = <0x31>;
                        phandle = <0x31>;

                        mdio {
                                #address-cells = <0x1>;
                                #size-cells = <0x0>;
                                linux,phandle = <0x32>;
                                phandle = <0x32>;

                                ethernet-phy@1 {
                                        reg = <0x1>;
                                        clocks = <0x2 0x43>;
                                        resets = <0x2 0x27>;
                                        linux,phandle = <0x47>;
                                        phandle = <0x47>;
                                };
                        };
                };



From: Stephen Graf [mailto:s_g...@telus.net] 
Sent: Thursday, October 12, 2017 8:35 PM
To: 'Mark Kettenis' <mark.kette...@xs4all.nl>; 'Patrick Wildt'
<patr...@blueri.se>; 'arm@openbsd.org' <arm@openbsd.org>
Subject: if_dwxe driver for h3

I don’t think that the driver is starting the clocks and/or clearing the
reset.  This is about the only thig that could cause the following on boot:
dwxe0: reset timeout

Testing on an orange pi one (H3).

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