I applied Patrick's changes and added one suggested by Mark:
/* Lookup PHY. */
// phy = OF_getpropint(faa->fa_node, "phy", 0);
phy = OF_getpropint(faa->fa_node, "phy-handle", 0);
node = OF_getnodebyphandle(phy);
printf("\n phy-handle node: 0x%x.\n", node);
if (node)
sc->sc_phyloc = OF_getpropint(node, "reg", MII_PHY_ANY);
printf("sc_phyloc: 0x%x.\n", sc->sc_phyloc);
pinctrl_byname(faa->fa_node, "default");
The console log is now:
dwxe0 at simplebus0
phy-handle node: 0x588.
sc_phyloc: 0x1.
: address 02:81:b1:07:76:5e
ukphy0 at dwxe0 phy 1: Generic IEEE 802.3u media interface, rev. 4: OUI
0x1e7a40, model 0x0004
ifmedia_set: no match for 0x100/0xffffffffffffffff
syscon0 at simplebus0
I think I have the dtb figured out. Can someone verify it:
/dts-v1/;
/ {
interrupt-parent = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
model = "Xunlong Orange Pi One";
compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
clocks {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
osc24M_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x16e3600>;
clock-output-names = "osc24M";
linux,phandle = <0x9>;
phandle = <0x9>;
};
osc32k_clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0x8000>;
clock-output-names = "osc32k";
linux,phandle = <0xa>;
phandle = <0xa>;
};
internal-osc-clk {
#clock-cells = <0x0>;
compatible = "fixed-clock";
clock-frequency = <0xf42400>;
clock-accuracy = <0x11e1a300>;
clock-output-names = "iosc";
linux,phandle = <0x16>;
phandle = <0x16>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
ethernet@1c30000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <0x49>;
reg = <0x1c30000 0x104>;
interrupts = <0x0 0x52 0x4>;
resets = <0x2 0xc>;
reset-names = "ahb";
clocks = <0x2 0x1b>;
clock-names = "ahb";
pinctrl-names = "default";
pinctrl-0 = <0x48>;
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "okay";
phy-handle = <0x47>;
phy-mode = "mii";
allwinner,leds-active-low;
linux,phandle = <0x31>;
phandle = <0x31>;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x32>;
phandle = <0x32>;
ethernet-phy@1 {
reg = <0x1>;
clocks = <0x2 0x43>;
resets = <0x2 0x27>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
};
};
syscon@1c00000 {
compatible = "allwinner,sun8i-h3-system-controller",
"syscon";
reg = <0x1c00000 0x1000>;
phandle = <0x49>;
};
dma-controller@01c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x1c02000 0x1000>;
interrupts = <0x0 0x32 0x4>;
clocks = <0x2 0x15>;
resets = <0x2 0x6>;
#dma-cells = <0x1>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
mmc@01c0f000 {
reg = <0x1c0f000 0x1000>;
resets = <0x2 0x7>;
reset-names = "ahb";
interrupts = <0x0 0x3c 0x4>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x2 0x16 0x2 0x47 0x2 0x49 0x2 0x48>;
clock-names = "ahb", "mmc", "output", "sample";
pinctrl-names = "default";
pinctrl-0 = <0x3 0x4>;
vmmc-supply = <0x5>;
bus-width = <0x4>;
cd-gpios = <0x6 0x5 0x6 0x0>;
cd-inverted;
};
mmc@01c10000 {
reg = <0x1c10000 0x1000>;
resets = <0x2 0x8>;
reset-names = "ahb";
interrupts = <0x0 0x3d 0x4>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x2 0x17 0x2 0x4a 0x2 0x4c 0x2 0x4b>;
clock-names = "ahb", "mmc", "output", "sample";
};
mmc@01c11000 {
reg = <0x1c11000 0x1000>;
resets = <0x2 0x9>;
reset-names = "ahb";
interrupts = <0x0 0x3e 0x4>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "allwinner,sun7i-a20-mmc";
clocks = <0x2 0x18 0x2 0x4d 0x2 0x4f 0x2 0x4e>;
clock-names = "ahb", "mmc", "output", "sample";
};
usb@01c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x1c19000 0x400>;
clocks = <0x2 0x20>;
resets = <0x2 0x11>;
interrupts = <0x0 0x47 0x4>;
interrupt-names = "mc";
phys = <0x7 0x0>;
phy-names = "usb";
extcon = <0x7 0x0>;
status = "okay";
dr_mode = "otg";
};
phy@01c19400 {
compatible = "allwinner,sun8i-h3-usb-phy";
reg = <0x1c19400 0x2c 0x1c1a800 0x4 0x1c1b800 0x4
0x1c1c800 0x4 0x1c1d800 0x4>;
reg-names = "phy_ctrl", "pmu0", "pmu1", "pmu2",
"pmu3";
clocks = <0x2 0x58 0x2 0x59 0x2 0x5a 0x2 0x5b>;
clock-names = "usb0_phy", "usb1_phy", "usb2_phy",
"usb3_phy";
resets = <0x2 0x0 0x2 0x1 0x2 0x2 0x2 0x3>;
reset-names = "usb0_reset", "usb1_reset",
"usb2_reset", "usb3_reset";
status = "okay";
#phy-cells = <0x1>;
usb0_id_det-gpios = <0x6 0x6 0xc 0x0>;
usb0_vbus-supply = <0x8>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
usb@01c1a000 {
compatible = "allwinner,sun8i-h3-ehci",
"generic-ehci";
reg = <0x1c1a000 0x100>;
interrupts = <0x0 0x48 0x4>;
clocks = <0x2 0x21 0x2 0x25>;
resets = <0x2 0x12 0x2 0x16>;
status = "okay";
};
usb@01c1a400 {
compatible = "allwinner,sun8i-h3-ohci",
"generic-ohci";
reg = <0x1c1a400 0x100>;
interrupts = <0x0 0x49 0x4>;
clocks = <0x2 0x21 0x2 0x25 0x2 0x5c>;
resets = <0x2 0x12 0x2 0x16>;
status = "okay";
};
usb@01c1b000 {
compatible = "allwinner,sun8i-h3-ehci",
"generic-ehci";
reg = <0x1c1b000 0x100>;
interrupts = <0x0 0x4a 0x4>;
clocks = <0x2 0x22 0x2 0x26>;
resets = <0x2 0x13 0x2 0x17>;
phys = <0x7 0x1>;
phy-names = "usb";
status = "okay";
};
usb@01c1b400 {
compatible = "allwinner,sun8i-h3-ohci",
"generic-ohci";
reg = <0x1c1b400 0x100>;
interrupts = <0x0 0x4b 0x4>;
clocks = <0x2 0x22 0x2 0x26 0x2 0x5d>;
resets = <0x2 0x13 0x2 0x17>;
phys = <0x7 0x1>;
phy-names = "usb";
status = "okay";
};
usb@01c1c000 {
compatible = "allwinner,sun8i-h3-ehci",
"generic-ehci";
reg = <0x1c1c000 0x100>;
interrupts = <0x0 0x4c 0x4>;
clocks = <0x2 0x23 0x2 0x27>;
resets = <0x2 0x14 0x2 0x18>;
phys = <0x7 0x2>;
phy-names = "usb";
status = "disabled";
};
usb@01c1c400 {
compatible = "allwinner,sun8i-h3-ohci",
"generic-ohci";
reg = <0x1c1c400 0x100>;
interrupts = <0x0 0x4d 0x4>;
clocks = <0x2 0x23 0x2 0x27 0x2 0x5e>;
resets = <0x2 0x14 0x2 0x18>;
phys = <0x7 0x2>;
phy-names = "usb";
status = "disabled";
};
usb@01c1d000 {
compatible = "allwinner,sun8i-h3-ehci",
"generic-ehci";
reg = <0x1c1d000 0x100>;
interrupts = <0x0 0x4e 0x4>;
clocks = <0x2 0x24 0x2 0x28>;
resets = <0x2 0x15 0x2 0x19>;
phys = <0x7 0x3>;
phy-names = "usb";
status = "disabled";
};
usb@01c1d400 {
compatible = "allwinner,sun8i-h3-ohci",
"generic-ohci";
reg = <0x1c1d400 0x100>;
interrupts = <0x0 0x4f 0x4>;
clocks = <0x2 0x24 0x2 0x28 0x2 0x5f>;
resets = <0x2 0x15 0x2 0x19>;
phys = <0x7 0x3>;
phy-names = "usb";
status = "disabled";
};
clock@01c20000 {
reg = <0x1c20000 0x400>;
clocks = <0x9 0xa>;
clock-names = "hosc", "losc";
#clock-cells = <0x1>;
#reset-cells = <0x1>;
compatible = "allwinner,sun8i-h3-ccu";
linux,phandle = <0x2>;
phandle = <0x2>;
};
pinctrl@01c20800 {
reg = <0x1c20800 0x400>;
interrupts = <0x0 0xb 0x4 0x0 0x11 0x4>;
clocks = <0x2 0x36 0x9 0xa>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <0x3>;
interrupt-controller;
#interrupt-cells = <0x3>;
compatible = "allwinner,sun8i-h3-pinctrl";
linux,phandle = <0x6>;
phandle = <0x6>;
emac0 {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17";
function = "emac";
drive-strength = <0x28>;
phandle = <0x48>;
};
i2c0 {
pins = "PA11", "PA12";
function = "i2c0";
linux,phandle = <0x13>;
phandle = <0x13>;
};
i2c1 {
pins = "PA18", "PA19";
function = "i2c1";
linux,phandle = <0x14>;
phandle = <0x14>;
};
i2c2 {
pins = "PE12", "PE13";
function = "i2c2";
linux,phandle = <0x15>;
phandle = <0x15>;
};
mmc0@0 {
pins = "PF0", "PF1", "PF2", "PF3", "PF4",
"PF5";
function = "mmc0";
drive-strength = <0x1e>;
bias-pull-up;
linux,phandle = <0x3>;
phandle = <0x3>;
};
mmc0_cd_pin@0 {
pins = "PF6";
function = "gpio_in";
bias-pull-up;
linux,phandle = <0x4>;
phandle = <0x4>;
};
mmc1@0 {
pins = "PG0", "PG1", "PG2", "PG3", "PG4",
"PG5";
function = "mmc1";
drive-strength = <0x1e>;
bias-pull-up;
};
mmc2_8bit {
pins = "PC5", "PC6", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
function = "mmc2";
drive-strength = <0x1e>;
bias-pull-up;
};
spdif@0 {
pins = "PA17";
function = "spdif";
};
spi0 {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
linux,phandle = <0xc>;
phandle = <0xc>;
};
spi1 {
pins = "PA15", "PA16", "PA14", "PA13";
function = "spi1";
linux,phandle = <0xd>;
phandle = <0xd>;
};
uart0@0 {
pins = "PA4", "PA5";
function = "uart0";
linux,phandle = <0xf>;
phandle = <0xf>;
};
uart1 {
pins = "PG6", "PG7";
function = "uart1";
linux,phandle = <0x10>;
phandle = <0x10>;
};
uart1_rts_cts {
pins = "PG8", "PG9";
function = "uart1";
};
uart2 {
pins = "PA0", "PA1";
function = "uart2";
linux,phandle = <0x11>;
phandle = <0x11>;
};
uart3 {
pins = "PA13", "PA14";
function = "uart3";
linux,phandle = <0x12>;
phandle = <0x12>;
};
led_pins@0 {
pins = "PA15";
function = "gpio_out";
linux,phandle = <0x19>;
phandle = <0x19>;
};
};
timer@01c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x1c20c00 0xa0>;
interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
clocks = <0x9>;
};
spi@01c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x1c68000 0x1000>;
interrupts = <0x0 0x41 0x4>;
clocks = <0x2 0x1e 0x2 0x52>;
clock-names = "ahb", "mod";
dmas = <0xb 0x17 0xb 0x17>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0xc>;
resets = <0x2 0xf>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
spi@01c69000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x1c69000 0x1000>;
interrupts = <0x0 0x42 0x4>;
clocks = <0x2 0x1f 0x2 0x53>;
clock-names = "ahb", "mod";
dmas = <0xb 0x18 0xb 0x18>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <0xd>;
resets = <0x2 0x10>;
status = "disabled";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
watchdog@01c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x1c20ca0 0x20>;
interrupts = <0x0 0x19 0x4>;
};
spdif@01c21000 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-spdif";
reg = <0x1c21000 0x400>;
interrupts = <0x0 0xc 0x4>;
clocks = <0x2 0x35 0x2 0x57>;
resets = <0x2 0x29>;
clock-names = "apb", "spdif";
dmas = <0xb 0x2>;
dma-names = "tx";
status = "disabled";
};
pwm@01c21400 {
compatible = "allwinner,sun8i-h3-pwm";
reg = <0x1c21400 0x8>;
clocks = <0x9>;
#pwm-cells = <0x3>;
status = "disabled";
};
codec@01c22c00 {
#sound-dai-cells = <0x0>;
compatible = "allwinner,sun8i-h3-codec";
reg = <0x1c22c00 0x400>;
interrupts = <0x0 0x1d 0x4>;
clocks = <0x2 0x34 0x2 0x6d>;
clock-names = "apb", "codec";
resets = <0x2 0x28>;
dmas = <0xb 0xf 0xb 0xf>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <0xe>;
status = "disabled";
};
serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28000 0x400>;
interrupts = <0x0 0x0 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x3e>;
resets = <0x2 0x31>;
dmas = <0xb 0x6 0xb 0x6>;
dma-names = "rx", "tx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0xf>;
};
serial@01c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28400 0x400>;
interrupts = <0x0 0x1 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x3f>;
resets = <0x2 0x32>;
dmas = <0xb 0x7 0xb 0x7>;
dma-names = "rx", "tx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <0x10>;
};
serial@01c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28800 0x400>;
interrupts = <0x0 0x2 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x40>;
resets = <0x2 0x33>;
dmas = <0xb 0x8 0xb 0x8>;
dma-names = "rx", "tx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <0x11>;
};
serial@01c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x1c28c00 0x400>;
interrupts = <0x0 0x3 0x4>;
reg-shift = <0x2>;
reg-io-width = <0x4>;
clocks = <0x2 0x41>;
resets = <0x2 0x34>;
dmas = <0xb 0x9 0xb 0x9>;
dma-names = "rx", "tx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <0x12>;
};
i2c@01c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2ac00 0x400>;
interrupts = <0x0 0x6 0x4>;
clocks = <0x2 0x3b>;
resets = <0x2 0x2e>;
pinctrl-names = "default";
pinctrl-0 = <0x13>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@01c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b000 0x400>;
interrupts = <0x0 0x7 0x4>;
clocks = <0x2 0x3c>;
resets = <0x2 0x2f>;
pinctrl-names = "default";
pinctrl-0 = <0x14>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
bme@76 {
reg = <0x76>;
interrupts = <0x0>;
compatible = "bosch,bme280";
};
};
i2c@01c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x1c2b400 0x400>;
interrupts = <0x0 0x8 0x4>;
clocks = <0x2 0x3d>;
resets = <0x2 0x30>;
pinctrl-names = "default";
pinctrl-0 = <0x15>;
status = "okay";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
interrupt-controller@01c81000 {
compatible = "arm,gic-400";
reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000
0x2000 0x1c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <0x3>;
interrupts = <0x1 0x9 0xf04>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
rtc@01f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x1f00000 0x54>;
interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
};
clock@1f01400 {
compatible = "allwinner,sun8i-h3-r-ccu";
reg = <0x1f01400 0x100>;
clocks = <0x9 0xa 0x16 0x2 0x9>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <0x1>;
#reset-cells = <0x1>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
codec-analog@01f015c0 {
compatible = "allwinner,sun8i-h3-codec-analog";
reg = <0x1f015c0 0x4>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
ir@01f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <0x17 0x4 0x17 0xb>;
clock-names = "apb", "ir";
resets = <0x17 0x0>;
interrupts = <0x0 0x25 0x4>;
reg = <0x1f02000 0x40>;
status = "disabled";
};
pinctrl@01f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x1f02c00 0x400>;
interrupts = <0x0 0x2d 0x4>;
clocks = <0x17 0x3 0x9 0xa>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <0x3>;
interrupt-controller;
#interrupt-cells = <0x3>;
linux,phandle = <0x18>;
phandle = <0x18>;
ir@0 {
pins = "PL11";
function = "s_cir_rx";
};
led_pins@0 {
pins = "PL10";
function = "gpio_out";
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
key_pins@0 {
pins = "PL3";
function = "gpio_in";
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x0>;
};
cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x1>;
};
cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x2>;
};
cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0x3>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1
0xa 0xf08>;
};
ahci-5v {
compatible = "regulator-fixed";
regulator-name = "ahci-5v";
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x6 0x1 0x8 0x0>;
status = "disabled";
};
usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
enable-active-high;
gpio = <0x18 0x0 0x2 0x0>;
status = "okay";
linux,phandle = <0x8>;
phandle = <0x8>;
};
usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x6 0x7 0x6 0x0>;
status = "disabled";
};
usb2-vbus {
compatible = "regulator-fixed";
regulator-name = "usb2-vbus";
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
regulator-boot-on;
enable-active-high;
gpio = <0x6 0x7 0x3 0x0>;
status = "disabled";
};
vcc3v0 {
compatible = "regulator-fixed";
regulator-name = "vcc3v0";
regulator-min-microvolt = <0x2dc6c0>;
regulator-max-microvolt = <0x2dc6c0>;
};
vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <0x325aa0>;
regulator-max-microvolt = <0x325aa0>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <0x4c4b40>;
regulator-max-microvolt = <0x4c4b40>;
};
aliases {
serial0 = "/soc/serial@01c28000";
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <0x19 0x1a>;
pwr_led {
label = "orangepi:green:pwr";
gpios = <0x18 0x0 0xa 0x0>;
default-state = "on";
};
status_led {
label = "orangepi:red:status";
gpios = <0x6 0x0 0xf 0x0>;
};
};
r_gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <0x1b>;
sw4 {
label = "sw4";
linux,code = <0x100>;
gpios = <0x18 0x0 0x3 0x1>;
};
};
};
-----Original Message-----
From: owner-...@openbsd.org [mailto:owner-...@openbsd.org] On Behalf Of
Patrick Wildt
Sent: Wednesday, September 27, 2017 2:12 PM
To: Stephen Graf <s_g...@telus.net>
Cc: arm@openbsd.org
Subject: Re: FW: help with setting up dwxe on orange pi one (h3)
If you got your device tree correctly set up, maybe try this diff:
diff --git a/sys/dev/fdt/if_dwxe.c b/sys/dev/fdt/if_dwxe.c index
85c5098af31..ce6a4e0f338 100644
--- a/sys/dev/fdt/if_dwxe.c
+++ b/sys/dev/fdt/if_dwxe.c
@@ -236,6 +236,7 @@ struct dwxe_desc {
#define SYSCON_H3_EPHY_LED_POL (1 << 17) /* 1: active low, 0:
active high */
#define SYSCON_H3_EPHY_CLK_SEL (1 << 18) /* 1: 24MHz, 0: 25MHz */
#define SYSCON_H3_EPHY_ADDR_SHIFT 20
+#define SYSCON_H3_EPHY_ADDR_MASK 0x1f
struct dwxe_buf {
bus_dmamap_t tb_map;
@@ -270,6 +271,7 @@ struct dwxe_softc {
struct mii_data sc_mii;
#define sc_media sc_mii.mii_media
int sc_link;
+ int sc_phyloc;
struct dwxe_dmamem *sc_txring;
struct dwxe_buf *sc_txbuf;
@@ -357,7 +359,6 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
struct fdt_attach_args *faa = aux;
struct ifnet *ifp;
int phy, phy_supply, node;
- int phyloc = MII_PHY_ANY;
sc->sc_node = faa->fa_node;
sc->sc_iot = faa->fa_iot;
@@ -372,7 +373,7 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
phy = OF_getpropint(faa->fa_node, "phy", 0);
node = OF_getnodebyphandle(phy);
if (node)
- phyloc = OF_getpropint(node, "reg", phyloc);
+ sc->sc_phyloc = OF_getpropint(node, "reg", MII_PHY_ANY);
pinctrl_byname(faa->fa_node, "default");
@@ -424,7 +425,7 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
dwxe_reset(sc);
- mii_attach(self, &sc->sc_mii, 0xffffffff, phyloc,
+ mii_attach(self, &sc->sc_mii, 0xffffffff, sc->sc_phyloc,
MII_OFFSET_ANY, 0);
if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
printf("%s: no PHY found!\n", sc->sc_dev.dv_xname); @@
-466,8 +467,14 @@ dwxe_phy_setup(struct dwxe_softc *sc)
syscon |= SYSCON_EPIT | SYSCON_ETCS_EXT_GMII;
else if (!strncmp(phy_mode, "mii", strlen("mii")) &&
OF_is_compatible(sc->sc_node, "allwinner,sun8i-h3-emac")) {
- panic("%s: setup internal phy", DEVNAME(sc));
- return;
+ syscon &= ~SYSCON_H3_EPHY_SHUTDOWN;
+ syscon |= SYSCON_H3_EPHY_SELECT|SYSCON_H3_EPHY_CLK_SEL;
+ if (OF_getproplen(sc->sc_node, "allwinner,leds-active-low")
>= 0)
+ syscon |= SYSCON_H3_EPHY_LED_POL;
+ else
+ syscon &= ~SYSCON_H3_EPHY_LED_POL;
+ syscon &= ~(SYSCON_H3_EPHY_ADDR_MASK <<
SYSCON_H3_EPHY_ADDR_SHIFT);
+ syscon |= sc->sc_phyloc << SYSCON_H3_EPHY_ADDR_SHIFT;
}
free(phy_mode, M_TEMP, len);
On Wed, Sep 27, 2017 at 10:56:44PM +0200, Patrick Wildt wrote:
> So, first of all copying the dtb entries is not a good idea. The
> reason is that the phandles are gonna be all wrong and overriden,
> because those are _generated_ on compile time. As you can see, the
> ethernet controller references phy handle 0x7, but the phy has a phandle
of 0x47.
> Something is wrong there.
>
> You should try to apply this "revert" that was committed in linux.
> Hope they'll soon make up their minds and commit a newer version.
>
> That said, for your specific machine I'll have to change some code to
> use the internal phy instead of the external one. Without it, if
> you're doing all right with the device tree, it should actually panic
> saying
> "gwxe0: setup internal phy".
>
> Patrick
>
> commit fe45174b72aead678da581bab9e9a37c9b26a070
> Author: Maxime Ripard <maxime.rip...@free-electrons.com>
> Date: Fri Aug 25 20:36:48 2017 +0200
>
> arm: dts: sunxi: Revert EMAC changes
>
> Since the discussion is not settled yet for the EMAC, and that the
release
> in getting really close, let's revert the changes for now, and we'll
> reintroduce them later.
>
> Acked-by: Chen-Yu Tsai <w...@csie.org>
> Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
>
> diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> index 6713d0f2b3f4..b1502df7b509 100644
> --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> @@ -56,8 +56,6 @@
>
> aliases {
> serial0 = &uart0;
> - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> - ethernet0 = &emac;
> ethernet1 = &xr819;
> };
>
> @@ -104,13 +102,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> index d756ff825116..a337af1de322 100644
> --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> @@ -52,7 +52,6 @@
> compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> serial1 = &uart1;
> };
> @@ -115,30 +114,12 @@
> status = "okay";
> };
>
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> -
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> status = "okay";
> };
>
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; diff --git
> a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> index 78f6c24952dd..8d2cc6e9a03f 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> @@ -46,10 +46,3 @@
> model = "FriendlyARM NanoPi NEO";
> compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; };
> -
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> index 17cdeae19c6f..8ff71b1bb45b 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> @@ -54,7 +54,6 @@
> aliases {
> serial0 = &uart0;
> /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> - ethernet0 = &emac;
> ethernet1 = &rtl8189;
> };
>
> @@ -118,13 +117,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> index 6880268e8b87..5fea430e0eb1 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> @@ -52,7 +52,6 @@
> compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> };
>
> @@ -98,13 +97,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; diff --git
> a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> index a10281b455f5..8b93f5c781a7 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> @@ -53,11 +53,6 @@
> };
> };
>
> -&emac {
> - /* LEDs changed to active high on the plus */
> - /delete-property/ allwinner,leds-active-low;
> -};
> -
> &mmc1 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc1_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> index 998b60f8d295..1a044b17d6c6 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> @@ -52,7 +52,6 @@
> compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> };
>
> @@ -114,13 +113,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> index 331ed683ac62..828ae7a526d9 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> @@ -47,10 +47,6 @@
> model = "Xunlong Orange Pi Plus / Plus 2";
> compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
>
> - aliases {
> - ethernet0 = &emac;
> - };
> -
> reg_gmac_3v3: gmac-3v3 {
> compatible = "regulator-fixed";
> regulator-name = "gmac-3v3";
> @@ -78,24 +74,6 @@
> status = "okay";
> };
>
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> -
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> -};
> -
> &mmc2 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc2_8bit_pins>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> index 80026f3caafc..97920b12a944 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> @@ -61,19 +61,3 @@
> gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> };
> };
> -
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> - status = "okay";
> -};
> -
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <1>;
> - };
> -};
> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> index d38282b9e5d4..11240a8313c2 100644
> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> @@ -391,32 +391,6 @@
> clocks = <&osc24M>;
> };
>
> - emac: ethernet@1c30000 {
> - compatible = "allwinner,sun8i-h3-emac";
> - syscon = <&syscon>;
> - reg = <0x01c30000 0x10000>;
> - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "macirq";
> - resets = <&ccu RST_BUS_EMAC>;
> - reset-names = "stmmaceth";
> - clocks = <&ccu CLK_BUS_EMAC>;
> - clock-names = "stmmaceth";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> -
> - mdio: mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - int_mii_phy: ethernet-phy@1 {
> - compatible =
"ethernet-phy-ieee802.3-c22";
> - reg = <1>;
> - clocks = <&ccu CLK_BUS_EPHY>;
> - resets = <&ccu RST_BUS_EPHY>;
> - };
> - };
> - };
> -
> spi0: spi@01c68000 {
> compatible = "allwinner,sun8i-h3-spi";
> reg = <0x01c68000 0x1000>;
