I think I have found the problem with the sxitwi driver.
After your note about the uart working and using the same clock as i2c, I turned my attention back to the sxidriver. I noted that there is no clear indication in the Allwinner documentation on how to clear the INT_FLAG bit once it is set. The text on page 445 in the Allwinner H3 data sheet re the INT_FLAG says that in slave mode the clock is held low until the INT_FLAG bit is written as '1'. This is what I am seeing even though the device is in master mode. The driver currently sets it to '0' after a status change. I changed the code to set the bit after a status change and the data started flowing! I think this may have to do it in a number of places. I would rather the author of this driver do it properly.
