On Wed, Sep 13, 2017 at 09:23:05PM +0300, Artturi Alm wrote:
> On Wed, Sep 13, 2017 at 10:50:28AM -0700, Stephen Graf wrote:
> > I am trying to get an i2c driver working on orange pi one (H3).
> > Reading the H3 datasheet would lead me to believe that the switwi driver
> > should work. The H3 data is the same except for 2 additional extended
> > feature registers that should not be needed.
> >
> > I modified the dtb and the sxitwi driver to set up H3 compatibility, rebuilt
> > the kernel and got the following in the dmesg:
> >
> > sxitwi0 at simplebus0sxiccmu_ccu_enable: 0x0000003b
> >
> > iic0 at sxitwi0
> > sxitwi1 at simplebus0sxiccmu_ccu_enable: 0x0000003c
> >
> > iic1 at sxitwi1
> > sxitwi2 at simplebus0sxiccmu_ccu_enable: 0x0000003d
> >
> > iic2 at sxitwi2
> >
> > Now I am stuck trying to write some code to test the driver. I have a device
> > on the i2c bus iic1 at address 76, a bme280 temperature, pressure and
> > humidity sensor.
> > I am not an accomplished c programmer and would dearly like to see an
> > example of using iic to read and write a device on the i2c bus.
> >
> > Note: I do not see nor can create iicx or switwi devices.
> >
>
> Hi,
>
> after you've finished what patrick@ wrote about, you might want to take
> a look at i/sys/dev/fdt/axp20x.c, it could very well be the simplest
> driver on iic-bus in tree, and consequently it does attach to sxitwi* :)
>
> -Artturi
So i was bored for a while; could work, but i don't have hw to test w/..
-Artturi
diff --git a/sys/dev/fdt/sxiccmu_clocks.h b/sys/dev/fdt/sxiccmu_clocks.h
index 8b25ac42bd4..f82613e0125 100644
--- a/sys/dev/fdt/sxiccmu_clocks.h
+++ b/sys/dev/fdt/sxiccmu_clocks.h
@@ -95,6 +95,10 @@ struct sxiccmu_ccu_bit sun50i_a64_gates[] = {
#define H3_CLK_BUS_PIO 54
+#define H3_CLK_BUS_I2C0 59
+#define H3_CLK_BUS_I2C1 60
+#define H3_CLK_BUS_I2C2 61
+
#define H3_CLK_BUS_UART0 62
#define H3_CLK_BUS_UART1 63
#define H3_CLK_BUS_UART2 64
@@ -128,6 +132,9 @@ struct sxiccmu_ccu_bit sun8i_h3_gates[] = {
[H3_CLK_BUS_OHCI2] = { 0x0060, 30 },
[H3_CLK_BUS_OHCI3] = { 0x0060, 31 },
[H3_CLK_BUS_PIO] = { 0x0068, 5 },
+ [H3_CLK_BUS_I2C0] = { 0x006c, 0, H3_CLK_APB2 },
+ [H3_CLK_BUS_I2C1] = { 0x006c, 1, H3_CLK_APB2 },
+ [H3_CLK_BUS_I2C2] = { 0x006c, 2, H3_CLK_APB2 },
[H3_CLK_BUS_UART0] = { 0x006c, 16, H3_CLK_APB2 },
[H3_CLK_BUS_UART1] = { 0x006c, 17, H3_CLK_APB2 },
[H3_CLK_BUS_UART2] = { 0x006c, 18, H3_CLK_APB2 },
@@ -195,6 +202,10 @@ struct sxiccmu_ccu_bit sun50i_a64_resets[] = {
#define H3_RST_BUS_EPHY 39
+#define H3_RST_BUS_I2C0 46
+#define H3_RST_BUS_I2C1 47
+#define H3_RST_BUS_I2C2 48
+
struct sxiccmu_ccu_bit sun8i_h3_resets[] = {
[H3_RST_USB_PHY0] = { 0x00cc, 0 },
[H3_RST_USB_PHY1] = { 0x00cc, 1 },
@@ -213,4 +224,7 @@ struct sxiccmu_ccu_bit sun8i_h3_resets[] = {
[H3_RST_BUS_OHCI2] = { 0x02c0, 30 },
[H3_RST_BUS_OHCI3] = { 0x02c0, 31 },
[H3_RST_BUS_EPHY] = { 0x02c8, 2 },
+ [H3_RST_BUS_I2C0] = { 0x02d8, 0 },
+ [H3_RST_BUS_I2C1] = { 0x02d8, 1 },
+ [H3_RST_BUS_I2C2] = { 0x02d8, 2 },
};
diff --git a/sys/dev/fdt/sxitwi.c b/sys/dev/fdt/sxitwi.c
index 260f6f1de57..d05f67150ed 100644
--- a/sys/dev/fdt/sxitwi.c
+++ b/sys/dev/fdt/sxitwi.c
@@ -178,8 +178,9 @@ sxitwi_match(struct device *parent, void *match, void *aux)
{
struct fdt_attach_args *faa = aux;
- return (OF_is_compatible(faa->fa_node, "allwinner,sun4i-a10-i2c") |
- OF_is_compatible(faa->fa_node, "allwinner,sun7i-a20-i2c"));
+ return (OF_is_compatible(faa->fa_node, "allwinner,sun4i-a10-i2c") ||
+ OF_is_compatible(faa->fa_node, "allwinner,sun7i-a20-i2c") ||
+ OF_is_compatible(faa->fa_node, "allwinner,sun6i-a31-i2c"));
}
void
