I don't think the changes are working.

I tested 3 ways:
- with a new system from the Aug 30 snapshot
- I update my src, checked that your changes were there and rebuilt the
kernel
- I modified the driver with the logging code and rebuilt the kernel

Attached are two console logs and the driver with logging.  I had to make
some changes to the logging code and I hope I got it right.

If you do not have time to work on this now I am quite happy to use the
brute force patch for the time being.
I would like to try setting up i2c and work with a temperature, pressure and
humidity sensor that I have.



-----Original Message-----
From: owner-...@openbsd.org [mailto:owner-...@openbsd.org] On Behalf Of Mark
Kettenis
Sent: Wednesday, August 30, 2017 9:41 AM
To: s_g...@telus.net
Cc: artturi....@gmail.com; arm@openbsd.org; arm@openbsd.org
Subject: Re: looking for help on gpio setup on orange pi one - SOME SORT OF
SUCCESS

I just committed a fix for the bug that Arturri noticed.  And here is a diff
on top of that that hopefully makes it possible to configure pins that have
not been touched by the firmware or OpenBSD on the newer Allwinner SoCs.

Can you try this?  You may need to wait a bit for my commit to propagate to
your favourite mirror.

Cheers,

Mark


Index: sxipio.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/sxipio.c,v retrieving revision 1.1 diff -u -p
-r1.1 sxipio.c
--- sxipio.c    21 Jan 2017 08:26:49 -0000      1.1
+++ sxipio.c    1 May 2017 20:48:50 -0000
@@ -206,6 +206,36 @@ sxipio_attach(struct device *parent, str
        printf(": %d pins\n", sc->sc_npins);
 }
 
+int
+sxipio_drive(int node)
+{
+       int drive;
+
+       drive = OF_getpropint(node, "allwinner,drive", -1);
+       if (drive >= 0)
+               return drive;
+       drive = OF_getpropint(node, "drive-strength", 0) - 10;
+       if (drive >= 0)
+               return (drive / 10);
+       return -1;
+}
+
+int
+sxipio_pull(int node)
+{
+       int pull;
+
+       pull = OF_getpropint(node, "allwinner,pull", -1);
+       if (pull >= 0)
+               return pull;
+       if (OF_getproplen(node, "bias-disable") == 0)
+               return 0;
+       if (OF_getproplen(node, "bias-pull-up") == 0)
+               return 1;
+       if (OF_getproplen(node, "bias-pull-down") == 0)
+               return 2;
+       return -1;
+}
 
 int
 sxipio_pinctrl(uint32_t phandle, void *cookie) @@ -213,7 +243,7 @@
sxipio_pinctrl(uint32_t phandle, void *c
        struct sxipio_softc *sc = cookie;
        char func[32];
        char *names, *name;
-       int port, pin, off;
+       int port, pin, off, mask;
        int mux, drive, pull;
        int node;
        int len;
@@ -225,18 +255,25 @@ sxipio_pinctrl(uint32_t phandle, void *c
                return -1;
 
        len = OF_getprop(node, "allwinner,function", func, sizeof(func));
-       if (len <= 0 || len >= sizeof(func))
-               return -1;
+       if (len <= 0 || len >= sizeof(func)) {
+               len = OF_getprop(node, "function", func, sizeof(func));
+               if (len <= 0 || len >= sizeof(func))
+                       return -1;
+       }
 
        len = OF_getproplen(node, "allwinner,pins");
-       if (len <= 0)
-               return -1;
+       if (len <= 0) {
+               len = OF_getproplen(node, "pins");
+               if (len <= 0)
+                       return -1;
+       }
 
        names = malloc(len, M_TEMP, M_WAITOK);
-       OF_getprop(node, "allwinner,pins", names, len);
+       if (OF_getprop(node, "allwinner,pins", names, len) <= 0)
+               OF_getprop(node, "pins", names, len);
 
-       drive = OF_getpropint(node, "allwinner,drive", 0);
-       pull = OF_getpropint(node, "allwinner,pull", 0);
+       drive = sxipio_drive(node);
+       pull = sxipio_pull(node);
 
        name = names;
        while (len > 0) {
@@ -261,11 +298,13 @@ sxipio_pinctrl(uint32_t phandle, void *c
                mux = sc->sc_pins[i].funcs[j].mux;
 
                s = splhigh();
-               off = (pin & 0x7) << 2;
-               SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
-               off = (pin & 0xf) << 1;
-               SXICMS4(sc, SXIPIO_DRV(port, pin), 0x3 << off, drive <<
off);
-               SXICMS4(sc, SXIPIO_PUL(port, pin), 0x3 << off, pull << off);
+               off = (pin & 0x7) << 2, mask = (0x7 << off);
+               SXICMS4(sc, SXIPIO_CFG(port, pin), mask, mux << off);
+               off = (pin & 0xf) << 1, mask = (0x3 << off);
+               if (drive >= 0 && drive < 4)
+                       SXICMS4(sc, SXIPIO_DRV(port, pin), mask, drive <<
off);
+               if (pull >= 0 && pull < 3)
+                       SXICMS4(sc, SXIPIO_PUL(port, pin), mask, pull <<
off);
                splx(s);
 
                len -= strlen(name) + 1;

$ more /usr/src/sys/dev/fdt/sxipio.c
/*      $OpenBSD: sxipio.c,v 1.4 2017/08/30 16:21:29 kettenis Exp $     */
/*
 * Copyright (c) 2010 Miodrag Vallat.
 * Copyright (c) 2013 Artturi Alm
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/gpio.h>
#include <sys/evcount.h>
#include <sys/malloc.h>

#include <machine/bus.h>
#include <machine/fdt.h>
#include <machine/intr.h>

#include <dev/gpio/gpiovar.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_clock.h>
#include <dev/ofw/ofw_gpio.h>
#include <dev/ofw/ofw_pinctrl.h>
#include <dev/ofw/fdt.h>

#include <dev/fdt/sunxireg.h>
#include <dev/fdt/sxipiovar.h>

#include "gpio.h"

#define SXIPIO_NPORT            9

struct sxipio_softc;

struct sxipio_gpio {
        struct sxipio_softc *sc;
        int port;
};

struct intrhand {
        int (*ih_func)(void *);         /* handler */
        void *ih_arg;                   /* arg for handler */
        int ih_ipl;                     /* IPL_* */
        int ih_irq;                     /* IRQ number */
        int ih_gpio;                    /* gpio pin */
        struct evcount ih_count;
        char *ih_name;
};

struct sxipio_softc {
        struct device           sc_dev;
        bus_space_tag_t         sc_iot;
        bus_space_handle_t      sc_ioh;
        void                    *sc_ih_h;
        void                    *sc_ih_l;
        int                     sc_max_il;
        int                     sc_min_il;

        struct sxipio_pin       *sc_pins;
        int                     sc_npins;
        struct gpio_controller  sc_gc;

        struct sxipio_gpio      sc_gpio[SXIPIO_NPORT];
        struct gpio_chipset_tag sc_gpio_tag[SXIPIO_NPORT];
        gpio_pin_t              sc_gpio_pins[SXIPIO_NPORT][32];

        struct intrhand         *sc_handlers[32];
};

#define SXIPIO_CFG(port, pin)   0x00 + ((port) * 0x24) + (((pin) >> 3) * 0x04)
#define SXIPIO_DAT(port)        0x10 + ((port) * 0x24)
#define SXIPIO_DRV(port, pin)   0x14 + ((port) * 0x24) + (((pin) >> 4) * 0x04)
#define SXIPIO_PUL(port, pin)   0x1c + ((port) * 0x24) + (((pin) >> 4) * 0x04)
#define SXIPIO_INT_CFG0(port)   0x0200 + ((port) * 0x04)
#define SXIPIO_INT_CTL          0x0210
#define SXIPIO_INT_STA          0x0214
#define SXIPIO_INT_DEB          0x0218 /* debounce register */

#define SXIPIO_GPIO_IN          0
#define SXIPIO_GPIO_OUT         1

int     sxipio_match(struct device *, void *, void *);
void    sxipio_attach(struct device *, struct device *, void *);

struct cfattach sxipio_ca = {
        sizeof (struct sxipio_softc), sxipio_match, sxipio_attach
};

struct cfdriver sxipio_cd = {
        NULL, "sxipio", DV_DULL
};

void    sxipio_attach_gpio(struct device *);
int     sxipio_pinctrl(uint32_t, void *);
void    sxipio_config_pin(void *, uint32_t *, int);
int     sxipio_get_pin(void *, uint32_t *);
void    sxipio_set_pin(void *, uint32_t *, int);

#include "sxipio_pins.h"

struct sxipio_pins {
        const char *compat;
        struct sxipio_pin *pins;
        int npins;
};

struct sxipio_pins sxipio_pins[] = {
        {
                "allwinner,sun4i-a10-pinctrl",
                sun4i_a10_pins, nitems(sun4i_a10_pins)
        },
        {
                "allwinner,sun5i-a13-pinctrl",
                sun5i_a13_pins, nitems(sun5i_a13_pins)
        },
        {
                "allwinner,sun5i-a10s-pinctrl",
                sun5i_a10s_pins, nitems(sun5i_a10s_pins)
        },
        {
                "allwinner,sun7i-a20-pinctrl",
                sun7i_a20_pins, nitems(sun7i_a20_pins)
        },
        {
                "allwinner,sun8i-h3-pinctrl",
                sun8i_h3_pins, nitems(sun8i_h3_pins)
        },
        {
                "allwinner,sun8i-h3-r-pinctrl",
                sun8i_h3_r_pins, nitems(sun8i_h3_r_pins)
        },
        {
                "allwinner,sun9i-a80-pinctrl",
                sun9i_a80_pins, nitems(sun9i_a80_pins)
        },
        {
                "allwinner,sun9i-a80-r-pinctrl",
                sun9i_a80_r_pins, nitems(sun9i_a80_r_pins)
        },
        {
                "allwinner,sun50i-a64-pinctrl",
                sun50i_a64_pins, nitems(sun50i_a64_pins)
        },
        {
                "allwinner,sun50i-h5-pinctrl",
                sun8i_h3_pins, nitems(sun8i_h3_pins)
        },
};

int
sxipio_match(struct device *parent, void *match, void *aux)
{
        struct fdt_attach_args *faa = aux;
        int i;

        for (i = 0; i < nitems(sxipio_pins); i++) {
                if (OF_is_compatible(faa->fa_node, sxipio_pins[i].compat))
                        return 1;
        }

        return 0;
}

void
sxipio_attach(struct device *parent, struct device *self, void *aux)
{
        struct sxipio_softc *sc = (struct sxipio_softc *)self;
        struct fdt_attach_args  *faa = aux;
        int i;

        sc->sc_iot = faa->fa_iot;
        if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
            faa->fa_reg[0].size, 0, &sc->sc_ioh))
                panic("%s: bus_space_map failed!", __func__);

        clock_enable_all(faa->fa_node);
        reset_deassert_all(faa->fa_node);

        for (i = 0; i < nitems(sxipio_pins); i++) {
                if (OF_is_compatible(faa->fa_node, sxipio_pins[i].compat)) {
                        sc->sc_pins = sxipio_pins[i].pins;
                        sc->sc_npins = sxipio_pins[i].npins;
                        break;
                }
        }

        KASSERT(sc->sc_pins);
        pinctrl_register(faa->fa_node, sxipio_pinctrl, sc);

        sc->sc_gc.gc_node = faa->fa_node;
        sc->sc_gc.gc_cookie = sc;
        sc->sc_gc.gc_config_pin = sxipio_config_pin;
        sc->sc_gc.gc_get_pin = sxipio_get_pin;
        sc->sc_gc.gc_set_pin = sxipio_set_pin;
        gpio_controller_register(&sc->sc_gc);

        config_defer(self, sxipio_attach_gpio);

        printf(": %d pins\n", sc->sc_npins);
}

int
sxipio_drive(int node)
{
        int drive;

        drive = OF_getpropint(node, "allwinner,drive", -1);
        if (drive >= 0)
                return drive;
        drive = OF_getpropint(node, "drive-strength", 0) - 10;
        if (drive >= 0)
                return (drive / 10);
        return -1;
}

int
sxipio_pull(int node)
{
        int pull;

        pull = OF_getpropint(node, "allwinner,pull", -1);
        if (pull >= 0)
                return pull;
        if (OF_getproplen(node, "bias-disable") == 0)
                return 0;
        if (OF_getproplen(node, "bias-pull-up") == 0)
                return 1;
        if (OF_getproplen(node, "bias-pull-down") == 0)
                return 2;
        return -1;
}

int
sxipio_pinctrl(uint32_t phandle, void *cookie)
{
        struct sxipio_softc *sc = cookie;
        char func[32];
        char *names, *name;
        int port, pin, off, mask;
        int mux, drive, pull;
        int node;
        int len;
        int i, j;
        int s;

        node = OF_getnodebyphandle(phandle);
        if (node == 0)
                return -1;

        len = OF_getprop(node, "allwinner,function", func, sizeof(func));
        if (len <= 0 || len >= sizeof(func)) {
                len = OF_getprop(node, "function", func, sizeof(func));
                if (len <= 0 || len >= sizeof(func))
                        return -1;
        }

        len = OF_getproplen(node, "allwinner,pins");
        if (len <= 0) {
                len = OF_getproplen(node, "pins");
                if (len <= 0)
                        return -1;
        }

        names = malloc(len, M_TEMP, M_WAITOK);
        if (OF_getprop(node, "allwinner,pins", names, len) <= 0)
                OF_getprop(node, "pins", names, len);

        drive = sxipio_drive(node);
        pull = sxipio_pull(node);

        name = names;
        while (len > 0) {
                /* Lookup the pin. */
                for (i = 0; i < sc->sc_npins; i++) {
                        if (strcmp(name, sc->sc_pins[i].name) == 0)
                                break;
                }
                if (i >= sc->sc_npins)
                        goto err;

                /* Lookup the function of the pin. */
                for (j = 0; j < nitems(sc->sc_pins[i].funcs); j++) {
                        if (strcmp(func, sc->sc_pins[i].funcs[j].name) == 0)
                                break;
                }
                if (j > nitems(sc->sc_pins[i].funcs))
                        goto err;

                port = sc->sc_pins[i].port;
                pin = sc->sc_pins[i].pin;
                mux = sc->sc_pins[i].funcs[j].mux;

                s = splhigh();
                off = (pin & 0x7) << 2, mask = (0x7 << off);
                SXICMS4(sc, SXIPIO_CFG(port, pin), mask, mux << off);
                off = (pin & 0xf) << 1, mask = (0x3 << off);
                if (drive >= 0 && drive < 4)
                        SXICMS4(sc, SXIPIO_DRV(port, pin), mask, drive << off);
                if (pull >= 0 && pull < 3)
                        SXICMS4(sc, SXIPIO_PUL(port, pin), mask, pull << off);
                splx(s);

                len -= strlen(name) + 1;
                name += strlen(name) + 1;
        }

        free(names, M_TEMP, len);
        return 0;

err:
        free(names, M_TEMP, len);
        return -1;
}

void
sxipio_config_pin(void *cookie, uint32_t *cells, int config)
{
        struct sxipio_softc *sc = cookie;
        uint32_t port = cells[0];
        uint32_t pin = cells[1];
        int mux, off;

        if (port > SXIPIO_NPORT || pin > 32)
                return;

        mux = (config & GPIO_CONFIG_OUTPUT) ? 1 : 0;
        off = (pin & 0x7) << 2;
        SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
}

int
sxipio_get_pin(void *cookie, uint32_t *cells)
{
        struct sxipio_softc *sc = cookie;
        uint32_t port = cells[0];
        uint32_t pin = cells[1];
        uint32_t flags = cells[2];
        uint32_t reg;
        int val;

        if (port > SXIPIO_NPORT || pin > 32)
                return 0;

        reg = SXIREAD4(sc, SXIPIO_DAT(port));
        reg &= (1 << pin);
        val = (reg >> pin) & 1;
        if (flags & GPIO_ACTIVE_LOW)
                val = !val;
        return val;
}

void
sxipio_set_pin(void *cookie, uint32_t *cells, int val)
{
        struct sxipio_softc *sc = cookie;
        uint32_t port = cells[0];
        uint32_t pin = cells[1];
        uint32_t flags = cells[2];
        uint32_t reg;

        if (port > SXIPIO_NPORT || pin > 32)
                return;

        reg = SXIREAD4(sc, SXIPIO_DAT(port));
        if (flags & GPIO_ACTIVE_LOW)
                val = !val;
        if (val)
                reg |= (1 << pin);
        else
                reg &= ~(1 << pin);
        SXIWRITE4(sc, SXIPIO_DAT(port), reg);
}

/*
 * GPIO support code
 */

int     sxipio_pin_read(void *, int);
void    sxipio_pin_write(void *, int, int);
void    sxipio_pin_ctl(void *, int, int);

static const struct gpio_chipset_tag sxipio_gpio_tag = {
        .gp_pin_read = sxipio_pin_read,
        .gp_pin_write = sxipio_pin_write,
        .gp_pin_ctl = sxipio_pin_ctl
};

int
sxipio_pin_read(void *cookie, int pin)
{
        struct sxipio_gpio *gpio = cookie;
        uint32_t cells[3];

        cells[0] = gpio->port;
        cells[1] = pin;
        cells[2] = 0;

        return sxipio_get_pin(gpio->sc, cells) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
}

void
sxipio_pin_write(void *cookie, int pin, int val)
{
        struct sxipio_gpio *gpio = cookie;
        uint32_t cells[3];

        cells[0] = gpio->port;
        cells[1] = pin;
        cells[2] = 0;

        sxipio_set_pin(gpio->sc, cells, val);
}

void
sxipio_pin_ctl(void *cookie, int pin, int flags)
{
        struct sxipio_gpio *gpio = cookie;
        uint32_t cells[3];

        cells[0] = gpio->port;
        cells[1] = pin;
        cells[2] = 0;

        if (ISSET(flags, GPIO_PIN_OUTPUT))
                sxipio_config_pin(gpio->sc, cells, GPIO_CONFIG_OUTPUT);
        else
                sxipio_config_pin(gpio->sc, cells, 0);
}

void
sxipio_attach_gpio(struct device *parent)
{
        struct sxipio_softc *sc = (struct sxipio_softc *)parent;
        struct gpiobus_attach_args gba;
        uint32_t reg;
        int port, pin;
        int off, mux;
        int state;
        int i;
        int m;

        for (i = 0; i < sc->sc_npins; i++) {
                /* Skip pins that have no gpio function. */
                if (strcmp(sc->sc_pins[i].funcs[0].name, "gpio_in") != 0 ||
                    strcmp(sc->sc_pins[i].funcs[1].name, "gpio_out") != 0)
                        continue;

                port = sc->sc_pins[i].port;
                pin = sc->sc_pins[i].pin;

                /* Get pin configuration. */
                reg = SXIREAD4(sc, SXIPIO_CFG(port, pin));
                off = (pin & 0x7) << 2;
                mux = (reg >> off) & 0x7;

                for (m = 0; m < 8; m++)
                        if (sc->sc_pins[i].funcs[m].mux == mux)
                                break;

                printf("%c%d mux %d<%s>%s", 'A' + (u_int)sc->sc_pins[i].port,
                    sc->sc_pins[i].pin, mux,
                    m >= 8 ? "invalid" : sc->sc_pins[i].funcs[m].name,
                    mux < 2 ? "- adding\n" : "- skipping\n");


                /* Skip pins that have been assigned other functions. */
                if (mux != SXIPIO_GPIO_IN && mux != SXIPIO_GPIO_OUT)
                        continue;

                /* Get pin state. */
                reg = SXIREAD4(sc, SXIPIO_DAT(port));
                state = (reg >> pin) & 1;

                sc->sc_gpio_pins[port][pin].pin_caps =
                    GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
                sc->sc_gpio_pins[port][pin].pin_flags =
                    GPIO_PIN_SET | (mux ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT);
                sc->sc_gpio_pins[port][pin].pin_state = state;
                sc->sc_gpio_pins[port][pin].pin_num = pin;
        }

        for (i = 0; i <= port; i++) {
                memcpy(&sc->sc_gpio_tag[i], &sxipio_gpio_tag, 
sizeof(sxipio_gpio_tag));
                sc->sc_gpio_tag[i].gp_cookie = &sc->sc_gpio[i];
                sc->sc_gpio[i].sc = sc;
                sc->sc_gpio[i].port = i;

                gba.gba_name = "gpio";
                gba.gba_gc = &sc->sc_gpio_tag[i];
                gba.gba_pins = &sc->sc_gpio_pins[i][0];
                gba.gba_npins = 32;

#if NGPIO > 0
                config_found(&sc->sc_dev, &gba, gpiobus_print);
#endif
        }
}
$
U-Boot SPL 2017.09-rc2 (Aug 22 2017 - 00:26:16)
DRAM: 512 MiB   
Trying to boot from MMC1

U-Boot 2017.09-rc2 (Aug 22 2017 - 00:26:16 -0600) Allwinner Technology

CPU:   Allwinner H3 (SUN8I 1680)
Model: Xunlong Orange Pi One
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   phy interface0
eth0: ethernet@1c30000
starting USB...
USB0:   USB EHCI 1.00
USB1:   USB OHCI 1.0
scanning bus 0 for devices... 5 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
reading /sun8i-h3-orangepi-one.dtb
14504 bytes read in 25 ms (566.4 KiB/s)
Found EFI removable media binary efi/boot/bootarm.efi
reading efi/boot/bootarm.efi
67356 bytes read in 35 ms (1.8 MiB/s)
## Starting EFI application at 42000000 ...
Scanning disks on usb...
Scanning disks on mmc...
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 5 disks
>> OpenBSD/armv7 BOOTARM 1.0
boot>
booting sd0a:/bsd: 3914260+166500+562396 [282343+90+519872+244490]=0x571a14

OpenBSD/armv7 booting ...
arg0 0xc0871a14 arg1 0x0 arg2 0x48000000
Allocating page tables
freestart = 0x40872000, free_pages = 128910 (0x0001f78e)
IRQ stack: p0x408a0000 v0xc08a0000
ABT stack: p0x408a1000 v0xc08a1000
UND stack: p0x408a2000 v0xc08a2000
SVC stack: p0x408a3000 v0xc08a3000
Creating L1 page table at 0x40874000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 1047252 bytes of bsd ELF symbol table ]
board type: 0
Copyright (c) 1982, 1986, 1989, 1991, 1993
        The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2017 OpenBSD. All rights reserved.  https://www.OpenBSD.org

OpenBSD 6.2-beta (GENERIC) #10: Thu Aug 31 05:03:55 PDT 2017
    sysad...@openbsdop1.graf.lan:/usr/src/sys/arch/armv7/compile/GENERIC
real mem  = 536870912 (512MB)
avail mem = 517312512 (493MB)
mainbus0 at root: Xunlong Orange Pi One
cpu0 at mainbus0: ARM Cortex-A7 r0p5 (ARMv7)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
cortex0 at mainbus0
sxiccmu0 at mainbus0
psci0 at mainbus0
simplebus0 at mainbus0: "soc"
sxiccmu1 at simplebus0
sxipio0 at simplebus0: 94 pins
sxipio1 at simplebus0: 12 pins
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 
addr 1
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 
addr 1
sxidog0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
ampintc0 at simplebus0 nirq 160, ncpu 4
sxirtc0 at simplebus0
A0 mux 7<invalid>- skipping
A1 mux 7<invalid>- skipping
A2 mux 7<invalid>- skipping
A3 mux 7<invalid>- skipping
A4 mux 2<uart0>- skipping
A5 mux 2<uart0>- skipping
A6 mux 7<invalid>- skipping
A7 mux 7<invalid>- skipping
A8 mux 7<invalid>- skipping
A9 mux 7<invalid>- skipping
A10 mux 7<invalid>- skipping
A11 mux 7<invalid>- skipping
A12 mux 7<invalid>- skipping
A13 mux 7<invalid>- skipping
A14 mux 7<invalid>- skipping
A15 mux 7<invalid>- skipping
A16 mux 7<invalid>- skipping
A17 mux 7<invalid>- skipping
A18 mux 7<invalid>- skipping
A19 mux 7<invalid>- skipping
A20 mux 7<invalid>- skipping
A21 mux 7<invalid>- skipping
C0 mux 7<invalid>- skipping
C1 mux 7<invalid>- skipping
C2 mux 7<invalid>- skipping
C3 mux 7<invalid>- skipping
C4 mux 7<invalid>- skipping
C5 mux 7<invalid>- skipping
C6 mux 7<invalid>- skipping
C7 mux 7<invalid>- skipping
C8 mux 7<invalid>- skipping
C9 mux 7<invalid>- skipping
C10 mux 7<invalid>- skipping
C11 mux 7<invalid>- skipping
C12 mux 7<invalid>- skipping
C13 mux 7<invalid>- skipping
C14 mux 7<invalid>- skipping
C15 mux 7<invalid>- skipping
C16 mux 7<invalid>- skipping
D0 mux 7<invalid>- skipping
D1 mux 7<invalid>- skipping
D2 mux 7<invalid>- skipping
D3 mux 7<invalid>- skipping
D4 mux 7<invalid>- skipping
D5 mux 7<invalid>- skipping
D6 mux 7<invalid>- skipping
D7 mux 7<invalid>- skipping
D8 mux 7<invalid>- skipping
D9 mux 7<invalid>- skipping
D10 mux 7<invalid>- skipping
D11 mux 7<invalid>- skipping
D12 mux 7<invalid>- skipping
D13 mux 7<invalid>- skipping
D14 mux 7<invalid>- skipping
D15 mux 7<invalid>- skipping
D16 mux 7<invalid>- skipping
D17 mux 7<invalid>- skipping
E0 mux 7<invalid>- skipping
E1 mux 7<invalid>- skipping
E2 mux 7<invalid>- skipping
E3 mux 7<invalid>- skipping
E4 mux 7<invalid>- skipping
E5 mux 7<invalid>- skipping
E6 mux 7<invalid>- skipping
E7 mux 7<invalid>- skipping
E8 mux 7<invalid>- skipping
E9 mux 7<invalid>- skipping
E10 mux 7<invalid>- skipping
E11 mux 7<invalid>- skipping
E12 mux 7<invalid>- skipping
E13 mux 7<invalid>- skipping
E14 mux 7<invalid>- skipping
E15 mux 7<invalid>- skipping
F0 mux 2<mmc0>- skipping
F1 mux 2<mmc0>- skipping
F2 mux 2<mmc0>- skipping
F3 mux 2<mmc0>- skipping
F4 mux 2<mmc0>- skipping
F5 mux 2<mmc0>- skipping
F6 mux 0<gpio_in>- adding
G0 mux 7<invalid>- skipping
G1 mux 7<invalid>- skipping
G2 mux 7<invalid>- skipping
G3 mux 7<invalid>- skipping
G4 mux 7<invalid>- skipping
G5 mux 7<invalid>- skipping
G6 mux 7<invalid>- skipping
G7 mux 7<invalid>- skipping
G8 mux 7<invalid>- skipping
G9 mux 7<invalid>- skipping
G10 mux 7<invalid>- skipping
G11 mux 7<invalid>- skipping
G12 mux 7<invalid>- skipping
G13 mux 7<invalid>- skipping
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
A0 mux 7<invalid>- skipping
A1 mux 7<invalid>- skipping
A2 mux 7<invalid>- skipping
A3 mux 7<invalid>- skipping
A4 mux 7<invalid>- skipping
A5 mux 7<invalid>- skipping
A6 mux 7<invalid>- skipping
A7 mux 7<invalid>- skipping
A8 mux 7<invalid>- skipping
A9 mux 7<invalid>- skipping
A10 mux 7<invalid>- skipping
A11 mux 7<invalid>- skipping
gpio7 at sxipio1: 32 pins
agtimer0 at mainbus0: tick rate 24000 KHz
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SL16G, 0080> SCSI2 0/direct removable
sd0: 15193MB, 512 bytes/sector, 31116288 sectors
uhub2 at uhub1 port 1 configuration 1 interface 0 "Terminus Technology USB 2.0 
Hub" rev 2.00/1.11 addr 2
umass0 at uhub2 port 1 configuration 1 interface 0 "Lexar JD Secure II +" rev 
2.00/11.00 addr 3
umass0: using SCSI over Bulk-Only
scsibus1 at umass0: 2 targets, initiator 0
sd1 at scsibus1 targ 1 lun 0: <Lexar, JD Secure II +, 1100> SCSI0 0/direct 
removable serial.05dca732012100015339
sd1: 1912MB, 512 bytes/sector, 3915776 sectors
umass1 at uhub2 port 3 configuration 1 interface 0 "VIA Labs,Inc. USB3.0 SATA 
Bridge" rev 2.10/4.14 addr 4
umass1: using SCSI over Bulk-Only
scsibus2 at umass1: 2 targets, initiator 0
sd2 at scsibus2 targ 1 lun 0: <ST310005, 28AS, CC38> SCSI4 0/direct fixed 
serial.21090711000000000025
sd2: 953869MB, 512 bytes/sector, 1953525164 sectors
run0 at uhub2 port 4 configuration 1 interface 0 "Ralink 802.11 n WLAN" rev 
2.00/1.01 addr 5
run0: MAC/BBP RT3070 (rev 0x0201), RF RT3020 (MIMO 1T1R), address 
00:1f:cf:52:86:52
vscsi0 at root
scsibus3 at vscsi0: 256 targets
softraid0 at root
scsibus4 at softraid0: 256 targets
boot device: sd0
root on sd0a (e50fea1f8609b974.a) swap on sd0b dump on sd0b
Automatic boot in progress: starting file system checks.
/dev/sd0a (e50fea1f8609b974.a): file system is clean; not checking
/dev/sd0l (e50fea1f8609b974.l): file system is clean; not checking
/dev/sd0d (e50fea1f8609b974.d): file system is clean; not checking
/dev/sd0f (e50fea1f8609b974.f): file system is clean; not checking
/dev/sd0g (e50fea1f8609b974.g): file system is clean; not checking
/dev/sd2a (126cfe6770dfc256.a): file system is clean; not checking
/dev/sd0h (e50fea1f8609b974.h): file system is clean; not checking
/dev/sd0k (e50fea1f8609b974.k): file system is clean; not checking
/dev/sd0e (e50fea1f8609b974.e): file system is clean; not checking
/dev/sd2d (126cfe6770dfc256.d): file system is clean; not checking
/dev/sd2e (126cfe6770dfc256.e): file system is clean; not checking
setting tty flags
pf enabled
starting network
DHCPREQUEST on run0 to 255.255.255.255
DHCPACK from 192.168.1.253 (cc:5d:4e:ad:f4:0f)
bound to 192.168.1.6 -- renewal in 43200 seconds.
reordering libraries: done.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
In rc.securelevel, setting gpio.
PA15
gpioctl: GPIOPINSET: Operation not supported by device
PD14
gpioctl: GPIOPINSET: Operation not supported by device
PL10
gpioctl: GPIOPINSET: Operation not supported by device
I2C_1
gpioiic0 at gpio2: SDA pin is unable to drive output
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd sndiod.
starting local daemons: cron.
Thu Aug 31 06:27:17 PDT 2017

OpenBSD/armv7 (openbsdop1.graf.lan) (console)

login:
Trying to boot from MMC1


U-Boot 2017.09-rc2 (Aug 22 2017 - 00:26:16 -0600) Allwinner Technology

CPU:   Allwinner H3 (SUN8I 1680)
Model: Xunlong Orange Pi One
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   phy interface0
eth0: ethernet@1c30000
starting USB...
USB0:   USB EHCI 1.00
USB1:   USB OHCI 1.0
scanning bus 0 for devices... 5 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
reading /sun8i-h3-orangepi-one.dtb
14504 bytes read in 29 ms (488.3 KiB/s)
Found EFI removable media binary efi/boot/bootarm.efi
reading efi/boot/bootarm.efi
67356 bytes read in 36 ms (1.8 MiB/s)
## Starting EFI application at 42000000 ...
Scanning disks on usb...
Scanning disks on mmc...
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 5 disks
>> OpenBSD/armv7 BOOTARM 1.0
boot>
booting sd0a:/bsd: 3916040+164320+561240 [282088+90+519872+244490]=0x570c0c

OpenBSD/armv7 booting ...
arg0 0xc0870c0c arg1 0x0 arg2 0x48000000
Allocating page tables
freestart = 0x40871000, free_pages = 128911 (0x0001f78f)
IRQ stack: p0x4089f000 v0xc089f000
ABT stack: p0x408a0000 v0xc08a0000
UND stack: p0x408a1000 v0xc08a1000
SVC stack: p0x408a2000 v0xc08a2000
Creating L1 page table at 0x40874000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 1046996 bytes of bsd ELF symbol table ]
board type: 0
Copyright (c) 1982, 1986, 1989, 1991, 1993
        The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2017 OpenBSD. All rights reserved.  https://www.OpenBSD.org

OpenBSD 6.2-beta (GENERIC) #9: Wed Aug 30 23:57:58 PDT 2017
    sysad...@openbsdop1.graf.lan:/usr/src/sys/arch/armv7/compile/GENERIC
real mem  = 536870912 (512MB)
avail mem = 517316608 (493MB)
mainbus0 at root: Xunlong Orange Pi One
cpu0 at mainbus0: ARM Cortex-A7 r0p5 (ARMv7)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
cortex0 at mainbus0
sxiccmu0 at mainbus0
psci0 at mainbus0
simplebus0 at mainbus0: "soc"
sxiccmu1 at simplebus0
sxipio0 at simplebus0: 94 pins
sxipio1 at simplebus0: 12 pins
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 
addr 1
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 
addr 1
sxidog0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
ampintc0 at simplebus0 nirq 160, ncpu 4
sxirtc0 at simplebus0
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
gpio7 at sxipio1: 32 pins
agtimer0 at mainbus0: tick rate 24000 KHz
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SL16G, 0080> SCSI2 0/direct removable
sd0: 15193MB, 512 bytes/sector, 31116288 sectors
uhub2 at uhub1 port 1 configuration 1 interface 0 "Terminus Technology USB 2.0 
Hub" rev 2.00/1.11 addr 2
umass0 at uhub2 port 1 configuration 1 interface 0 "Lexar JD Secure II +" rev 
2.00/11.00 addr 3
umass0: using SCSI over Bulk-Only
scsibus1 at umass0: 2 targets, initiator 0
sd1 at scsibus1 targ 1 lun 0: <Lexar, JD Secure II +, 1100> SCSI0 0/direct 
removable serial.05dca732012100015339
sd1: 1912MB, 512 bytes/sector, 3915776 sectors
umass1 at uhub2 port 3 configuration 1 interface 0 "VIA Labs,Inc. USB3.0 SATA 
Bridge" rev 2.10/4.14 addr 4
umass1: using SCSI over Bulk-Only
scsibus2 at umass1: 2 targets, initiator 0
sd2 at scsibus2 targ 1 lun 0: <ST310005, 28AS, CC38> SCSI4 0/direct fixed 
serial.21090711000000000025
sd2: 953869MB, 512 bytes/sector, 1953525164 sectors
run0 at uhub2 port 4 configuration 1 interface 0 "Ralink 802.11 n WLAN" rev 
2.00/1.01 addr 5
run0: MAC/BBP RT3070 (rev 0x0201), RF RT3020 (MIMO 1T1R), address 
00:1f:cf:52:86:52
vscsi0 at root
scsibus3 at vscsi0: 256 targets
softraid0 at root
scsibus4 at softraid0: 256 targets
boot device: sd0
root on sd0a (e50fea1f8609b974.a) swap on sd0b dump on sd0b
Automatic boot in progress: starting file system checks.
/dev/sd0a (e50fea1f8609b974.a): file system is clean; not checking
/dev/sd0l (e50fea1f8609b974.l): file system is clean; not checking
/dev/sd0d (e50fea1f8609b974.d): file system is clean; not checking
/dev/sd0f (e50fea1f8609b974.f): file system is clean; not checking
/dev/sd0g (e50fea1f8609b974.g): file system is clean; not checking
/dev/sd0h (e50fea1f8609b974.h): file system is clean; not checking
/dev/sd0k (e50fea1f8609b974.k): file system is clean; not checking
/dev/sd0e (e50fea1f8609b974.e): file system is clean; not checking
/dev/sd2a (126cfe6770dfc256.a): file system is clean; not checking
/dev/sd2d (126cfe6770dfc256.d): file system is clean; not checking
/dev/sd2e (126cfe6770dfc256.e): file system is clean; not checking
setting tty flags
pf enabled
starting network
DHCPREQUEST on run0 to 255.255.255.255
DHCPACK from 192.168.1.253 (cc:5d:4e:ad:f4:0f)
bound to 192.168.1.6 -- renewal in 43200 seconds.
reordering libraries: done.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
In rc.securelevel, setting gpio.
PA15
gpioctl: GPIOPINSET: Operation not supported by device
PD14
gpioctl: GPIOPINSET: Operation not supported by device
PL10
gpioctl: GPIOPINSET: Operation not supported by device
I2C_1
gpioiic0 at gpio2: SDA pin is unable to drive output
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd sndiod.
starting local daemons: cron.
Thu Aug 31 00:20:31 PDT 2017

OpenBSD/armv7 (openbsdop1.graf.lan) (console)

login: sysadmin

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