Two sunxi driver diffs

[Mark Kettenis]

Here are two diffs for the sunxi armv7 platform that I can't test
myself.  The first one is for sxiahci(4), and changes it to use the
regulator API to power on the bus.  The second one is for sxie(4), and
changes it to use the pinctrl API to select the appropriate pins.

If anybody with a Allwinner A10/A10s/A13 board (Cubiboard, pcDuino,
Olinuxino A10/A10s/A13) could verify that this doesn't break their
SATA or Ethernet it would be greatly appreciated.


Index: arch/armv7/sunxi/sxiahci.c
===================================================================
RCS file: /cvs/src/sys/arch/armv7/sunxi/sxiahci.c,v
retrieving revision 1.9
diff -u -p -r1.9 sxiahci.c
--- arch/armv7/sunxi/sxiahci.c  5 Aug 2016 19:00:25 -0000       1.9
+++ arch/armv7/sunxi/sxiahci.c  14 Aug 2016 11:21:34 -0000
@@ -33,9 +33,9 @@
 #include <armv7/armv7/armv7var.h>
 #include <armv7/sunxi/sunxireg.h>
 #include <armv7/sunxi/sxiccmuvar.h>
-#include <armv7/sunxi/sxipiovar.h>
 
 #include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_regulator.h>
 #include <dev/ofw/fdt.h>
 
 #define        SXIAHCI_CAP     0x0000
@@ -97,6 +97,7 @@ sxiahci_attach(struct device *parent, st
        struct sxiahci_softc *sxisc = (struct sxiahci_softc *)self;
        struct ahci_softc *sc = &sxisc->sc;
        struct fdt_attach_args *faa = aux;
+       uint32_t target_supply;
        uint32_t timo;
 
        if (faa->fa_nreg < 1)
@@ -165,8 +166,9 @@ sxiahci_attach(struct device *parent, st
        SXIWRITE4(sc, SXIAHCI_RWC, 7);
 
        /* power up phy */
-       sxipio_setcfg(SXIAHCI_PWRPIN, SXIPIO_OUTPUT);
-       sxipio_setpin(SXIAHCI_PWRPIN);
+       target_supply = OF_getpropint(faa->fa_node, "target-supply", 0);
+       if (target_supply)
+               regulator_enable(target_supply);
 
        sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_BIO,
            ahci_intr, sc, sc->sc_dev.dv_xname);
@@ -190,7 +192,8 @@ sxiahci_attach(struct device *parent, st
 irq:
        arm_intr_disestablish(sc->sc_ih);
 clrpwr:
-       sxipio_clrpin(SXIAHCI_PWRPIN);
+       if (target_supply)
+               regulator_disable(target_supply);
 dismod:
        sxiccmu_disablemodule(CCMU_AHCI);
        bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
Index: arch/armv7/sunxi/sxie.c
===================================================================
RCS file: /cvs/src/sys/arch/armv7/sunxi/sxie.c,v
retrieving revision 1.19
diff -u -p -r1.19 sxie.c
--- arch/armv7/sunxi/sxie.c     5 Aug 2016 22:19:23 -0000       1.19
+++ arch/armv7/sunxi/sxie.c     14 Aug 2016 11:21:34 -0000
@@ -49,9 +49,9 @@
 #include <armv7/armv7/armv7var.h>
 #include <armv7/sunxi/sunxireg.h>
 #include <armv7/sunxi/sxiccmuvar.h>
-#include <armv7/sunxi/sxipiovar.h>
 
 #include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_pinctrl.h>
 #include <dev/ofw/fdt.h>
 
 /* configuration registers */
@@ -215,6 +215,8 @@ sxie_attach(struct device *parent, struc
        if (faa->fa_nreg < 1)
                return;
 
+       pinctrl_byname(faa->fa_node, "default");
+
        sc->sc_iot = faa->fa_iot;
 
        if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
@@ -273,11 +275,9 @@ sxie_attach(struct device *parent, struc
 void
 sxie_socware_init(struct sxie_softc *sc)
 {
-       int i, have_mac = 0;
+       int have_mac = 0;
        uint32_t reg;
 
-       for (i = 0; i < SXIPIO_EMAC_NPINS; i++)
-               sxipio_setcfg(i, 2); /* mux pins to EMAC */
        sxiccmu_enablemodule(CCMU_EMAC);
 
        /* MII clock cfg */