[Anima] Re: Adoption call for constrained GRASP ( draft-zhu-anima-lightweight-grasp )

[Sheng JIANG]

>Sure, but it's reducing the collision space from 4294967296 to 65536. That
>means that collisions *will* happen so the collision avoidance mechanism
>*will* be exercised.


We fully agree that there are more possibility of collisions with this reduced 
bit design. Giving the cGRASP is targeting constrained devices and network, we 
expect the scale of network and devices are also limited. So, 
the collisions issue should be in an acceptable limit, too.


Regards,


Sheng


                    Brian E Carpenter<brian.e.carpen...@gmail.com&gt;&nbsp;On 
Monday,  May 12, 2025, 4:10 wrote:

On 11-May-25 21:53, Michael Richardson wrote:
&gt; 
&gt; Brian E Carpenter <brian.e.carpen...@gmail.com&gt; wrote:
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; One detail: when developing RFC 8991 we 
were given very strong advice to
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; avoid the word "nonce" as some people 
find it offensive (it has a slang
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; meaning in British English). We 
switched to "handle" in that RFC. But given
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; that GRASP and cGRASP both have a 
pseudo-random "session-id", why not simply
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; call it "message-id"?
&gt; 
&gt; Oh.&nbsp; The rest of the security community will be surprised, so I think 
that
&gt; ship has sailed, and we should stick with nonce, if it's purpose is 
freshness
&gt; and/or contribution to a cryptographic state.
&gt; {sitting in a cafe next to Farrindon station. Shall I ask a random person?}
&gt; 
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; I am a little concerned by the 
reduction from 32 to 16 bits for the
&gt;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &gt; session-id.
&gt; 
&gt; Since it's CBOR, there are no on-the-wire changes.
&gt; It's really about saying that implementations can expect to use a 16-bit
&gt; register for this.&nbsp;&nbsp; I.e., it's not saving any bytes in the 
wire, it's saving
&gt; cycles on a CPU with a 16-bit ALU.

Sure, but it's reducing the collision space from 4294967296 to 65536. That
means that collisions *will* happen so the collision avoidance mechanism
*will* be exercised. That may be a good design choice but I think it needs
to be documented.

&nbsp;&nbsp; Brian

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