[AMD Official Use Only - General]
Acked-by: Hawking Zhang <hawking.zh...@amd.com>
Regards,
Hawking
-----Original Message-----
From: Lazar, Lijo <lijo.la...@amd.com>
Sent: Friday, October 20, 2023 15:02
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <hawking.zh...@amd.com>; Deucher, Alexander
<alexander.deuc...@amd.com>; Kamal, Asad <asad.ka...@amd.com>; Ma, Le
<le...@amd.com>
Subject: [PATCH] drm/amdgpu: Add a read to GFX v9.4.3 ring test
Issue a read to confirm the register write before ringing doorbell. With
multiple XCCs there is chance for race condition.
Signed-off-by: Lijo Lazar <lijo.la...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index a1c2c952d882..5861e4d0eda9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -256,6 +256,7 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring
*ring)
xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0);
scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id),
regSCRATCH_REG0);
WREG32(scratch_reg0_offset, 0xCAFEDEAD);
+ tmp = RREG32(scratch_reg0_offset);
r = amdgpu_ring_alloc(ring, 3);
if (r)
--
2.25.1
