Hi Feifei,
On 9/25/2023 22:20, Xu, Feifei wrote:
[AMD Official Use Only - General]
Hi Mario,
Navi32 which DCE3.2.0 not support this. This patch will cause modprobe fail on
NV32.
[ +0.000126] [drm] DSC precompute is not needed.
[ +19.026503] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous
command: SMN_C2PMSG_66:0x0000002D SMN_C2PMSG_82:0x00000000
[ +0.000002] amdgpu 0000:03:00.0: amdgpu: Failed to power gate JPEG!
[ +0.000001] [drm:amdgpu_dpm_enable_jpeg [amdgpu]] *ERROR* Dpm disable jpeg
failed, ret = -62.
[9月26 11:00] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous
command: SMN_C2PMSG_66:0x0000002D SMN_C2PMSG_82:0x00000000
[ +0.000001] amdgpu 0000:03:00.0: amdgpu: Failed to power gate VCN!
[ +0.000000] [drm:amdgpu_dpm_enable_uvd [amdgpu]] *ERROR* Dpm disable uvd
failed, ret = -62.
[ +3.557018] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous
command: SMN_C2PMSG_66:0x0000002D SMN_C2PMSG_82:0x00000000
[ +16.269817] watchdog: BUG: soft lockup - CPU#7 stuck for 26s! [modprobe:28704]
Either change to:
return adev->ip_versions[DCE_HWIP][0] == IP_VERSION(3, 2, 0);
You mean to add an exclusion for Navi32 for this case to return 'false'
for amdgpu_device_seamless_boot_supported()?
Or revert [PATCH v2 4/4] drm/amd: Enable seamless boot by default on newer
ASICs both ok.
What kind of connector do you have connected to display? Is it eDP?
Are you sure it's this patch causing it? With latest ASDN hash can you
reproduce it and then try the module parameter (amdgpu.seamless=0) to
disable it and confirm things are fixed?
Can I see more complete dmesg?
Thanks,
Feifei
-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Mario
Limonciello
Sent: Thursday, September 14, 2023 1:15 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <alexander.deuc...@amd.com>; Wentland, Harry
<harry.wentl...@amd.com>; Limonciello, Mario <mario.limoncie...@amd.com>
Subject: [PATCH v2 4/4] drm/amd: Enable seamless boot by default on newer ASICs
Seamless boot can technically be supported as far back as DCN1 but to avoid
regressions on older hardware, enable it for DCN3 and later.
If users report using the module parameter that it works on older ASICs as
well, this can be adjusted.
Signed-off-by: Mario Limonciello <mario.limoncie...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 2116e016178a..38fafed31a1b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1361,9 +1361,9 @@ bool amdgpu_device_need_post(struct amdgpu_device *adev)
/*
* Check whether seamless boot is supported.
*
- * So far we only support seamless boot on select ASICs.
- * If everything goes well, we may consider expanding
- * seamless boot to other ASICs.
+ * So far we only support seamless boot on DCE 3.0 or later.
+ * If users report that it works on older ASICS as well, we may
+ * loosen this.
*/
bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev) { @@
-1383,14 +1383,7 @@ bool amdgpu_device_seamless_boot_supported(struct
amdgpu_device *adev)
if (adev->mman.keep_stolen_vga_memory)
return false;
- switch (adev->ip_versions[DCE_HWIP][0]) {
- case IP_VERSION(3, 0, 1):
- return true;
- default:
- break;
- }
-
- return false;
+ return adev->ip_versions[DCE_HWIP][0] > IP_VERSION(3, 0, 0);
}
/*
--
2.34.1
